Inner Conductive Layer Roughness for Solder Spread Control

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Solution Overview

Problem

Semiconductor devices with insulating substrates face challenges in controlling the spread of wetting materials like solder, particularly due to the thinness of the conductive layers, which affects joint strength and thermal stress management.

Innovation Solution

The semiconductor device employs a first insulating substrate with a surface having regions of varying roughness, where a conductive spacer is joined to the smoother region with higher wettability, and the rougher region inhibits wetting material spread, enhancing joint control and thermal stress management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a thin conductive layer is used on the insulating substrate, then the device structure is simplified and manufacturing is easier, but the control of wetting material spread becomes difficult and joint strength is reduced

Engineering Contradiction:
Improveease of manufactureVSAvoidwetting material spread control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The conductive layer is designed with spatially varying surface roughness: a first region with first surface roughness and a second region with second surface roughness that is greater than the first. This local differentiation allows the smoother first region to promote wetting material spread for adequate joint coverage, while the rougher second region acts as a barrier to prevent excessive spread, thereby achieving precise control of wetting material behavior on a thin conductive layer.

Inventive Principle:
Principle #3Local quality

2Device complexity

If a thin conductive layer is used on the insulating substrate, then the device structure is simplified, but the joint strength between conductive spacer and substrate is reduced

Engineering Contradiction:
Improvedevice complexityVSAvoidjoint strength
Core Design Contradiction:
Device complexityVSStrength

Solution Approach 1:

The conductive layer incorporates a first region with lower surface roughness that enhances wettability and promotes adequate spread of joint material, thereby ensuring sufficient joint strength between the conductive spacer and the insulating substrate. This localized smooth region compensates for the thinness of the conductive layer by optimizing the interface properties where the joint is formed.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If a thin conductive layer is used on the insulating substrate, then manufacturing is easier, but thermal stress management is compromised

Engineering Contradiction:
Improveease of manufactureVSAvoidthermal stress
Core Design Contradiction:
Ease of manufactureVSStress or pressure

Solution Approach 1:

The second region with higher surface roughness functions as a controlled barrier that limits the spread of wetting materials and provides a mechanical anchor for the joint material. This rougher region helps distribute and manage thermal stresses by creating a more robust stress distribution interface, compensating for the reduced thickness of the conductive layer.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively controls the spread of wetting materials, maintains joint strength, and reduces thermal stress within the semiconductor device.

Implementation Method 1

The first inner conductive layer includes a surface having a first region and a second region. The second region surrounds the first region and has a larger surface roughness than the first region. The first conductive spacer is joined to the first region of the first inner conductive layer through a first junction layer.

Methodology Applied
Scientific EffectWetting: Wetting

Data Source

PatentUS12125823B2Semiconductor device including inner conductive layer having regions of different surface roughness
Publication Date: 2024.10.22 DENSO CORP
  • US12125823B2 patent drawing
  • US12125823B2 patent drawing
  • US12125823B2 patent drawing

AI summary

A semiconductor device includes a first insulating substrate and a first semiconductor element joined to the first insulating substrate through the first conductive spacer. The first insulating substrate includes a first insulating layer and a first inner conductive layer disposed at a side of the first insulating layer. The first inner conductive layer includes a surface having a first region and a second region. The second region surrounds the first region and has larger surface roughness than the first region. The first conductive spacer is joined to the first region of the first inner conductive layer through a first junction layer.