Conductive Line Formation Using Spacer Etching for Sub-20nm Pitches

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in semiconductor processing is to form conductive lines with widths below 20 nanometers, as existing techniques face difficulties in completely filling narrow trenches due to resistivity issues and void formation, limiting the miniaturization of integrated circuitry.

Innovation Solution

The method involves forming trenches with conductive material that spans between sidewalls, using a conductive liner and fill material, and employing spacer-forming layers to facilitate the deposition and etching of conductive lines, which are then patterned to achieve mirror-image conductive lines within each trench, allowing for complete filling and reduced voids.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If photolithography is used to form conductive lines, then manufacturing process is simplified, but minimum pitch limits feature size reduction

Engineering Contradiction:
Improveconductive line widthVSAvoidminimum pitch
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The conductive line formation process is segmented into multiple steps: first forming a mandrel pattern at a relaxed pitch, then depositing spacer material around the mandrel, and finally removing the mandrel to leave the spacer-defined conductive lines. This segmentation allows the final conductive lines to achieve dimensions below the original photolithography minimum pitch.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A mandrel structure is formed in advance as a template for the final conductive lines. The mandrel is positioned at a pitch that is manufacturable with standard photolithography, and subsequent spacer deposition uses this pre-formed mandrel to define the final, smaller-pitch conductive lines.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If trench width is reduced below 20 nanometers, then conductive line density increases, but complete filling becomes difficult due to resistivity issues and void formation

Engineering Contradiction:
Improveconductive line densityVSAvoidfilling completeness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Instead of directly forming conductive lines by filling narrow trenches, the process inverts the approach: a mandrel is formed first, then spacer material is deposited around it, and the mandrel is removed. This inversion allows the conductive material to be deposited in slightly wider spaces defined by the spacers, ensuring complete filling without voids while achieving the desired high density.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

A mandrel structure serves as an intermediary element that enables the formation of high-density conductive lines. The mandrel is temporarily present during the spacer deposition process, providing a template that ensures uniform spacer formation, and is subsequently removed to leave the final conductive pattern.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Length of moving object

If spacer-forming layers are used to achieve sub-lithographic features, then pitch multiplication is enabled, but process complexity increases

Engineering Contradiction:
ImprovepitchVSAvoidprocess steps
Core Design Contradiction:
Length of moving objectVSDevice complexity

Solution Approach 1:

The spacer-forming layer serves multiple functions: it defines the final conductive line dimensions, provides a template for pattern transfer, and enables pitch multiplication. By making this single layer multi-functional, the process achieves complex results without proportionally increasing the number of process steps.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of conductive lines with widths as low as 20 nanometers or smaller, ensuring complete spanning of conductive material between trench sidewalls and reducing voids, thereby enhancing the density and conductivity of integrated circuitry.

Implementation Method 1

The spacer-forming layers are commonly anisotropically etched to form sub-lithographic features

Methodology Applied
Scientific EffectAnisotropic etching:

Implementation Method 2

Conductive material is deposited over the damascene material and to within the trench to overfill the trench

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS9064935B2Methods of forming a plurality of conductive lines in the fabrication of integrated circuitry, methods of forming an array of conductive lines, and integrated circuitry
Publication Date: 2015.06.23 MICRON TECHNOLOGY INC
  • US9064935B2 patent drawing
  • US9064935B2 patent drawing
  • US9064935B2 patent drawing

AI summary

A method of forming a pair of conductive lines in the fabrication of integrated circuitry includes forming a trench into a damascene material received over a substrate. Conductive material is deposited over the damascene material and to within the trench to overfill the trench. The conductive material is removed back at least to the damascene material to leave at least some of the conductive material remaining in the trench. Etching is conducted longitudinally through the conductive material within the trench to form first and second conductive lines within the trench which are mirror images of one another in lateral cross section along at least a majority of length of the first and second conductive lines. Other implementations are contemplated.