Conductive Line Formation for Void-Free High-Aspect-Ratio Trenches
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Solution Overview
Problem
Existing semiconductor manufacturing technologies face challenges in forming conductive lines with high aspect ratios without electrical defects, particularly due to uneven deposition rates that result in voids and seams during the filling of trenches.
Innovation Solution
A method involving selective deposition and removal of sacrificial layers to control the thickness and distribution of conductive layers within trenches, using processes like PVD and CVD to ensure uniform coverage and minimize voids, followed by gap-filling insulation to enhance aspect ratios.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a trench is filled with a conductive layer using conventional deposition processes, then the conductive line is formed, but voids and seams occur due to uneven deposition rates
Solution Approach 1:
A sacrificial layer is formed in advance within the trench before the conductive layer deposition. This preliminary structure serves as a template that guides the conformal deposition process, ensuring uniform conductive layer thickness and preventing void formation during the filling process.
Solution Approach 2:
The sacrificial layer acts as an intermediary structure between the trench and the conductive layer. It provides a controlled interface that enables uniform deposition of the conductive material and facilitates subsequent selective removal to achieve the desired conductive line pattern without defects.
2Productivity
If the trench width is reduced to increase integration degree, then more devices can be integrated, but filling the trench without electrical defects becomes more difficult
Solution Approach 1:
The invention changes the deposition parameters by using conformal deposition processes that deposit material uniformly across different surfaces (bottom and side walls of the trench). This parameter change ensures consistent conductive layer thickness even in narrow trenches, enabling high integration without compromising filling quality.
Solution Approach 2:
The conductive layer is deposited with different thicknesses at different locations within the trench structure. The deposition process is designed to create locally optimized thickness distributions that ensure complete coverage and electrical connectivity in high-aspect-ratio trenches while maintaining overall pattern fidelity.
3Reliability
If the conductive layer thickness on the bottom surface is made greater than on the side surface, then electrical connection is improved, but material usage increases
Solution Approach 1:
The deposition process is designed to deposit the conductive layer with locally optimized thickness: thicker on the bottom surface where electrical connection is critical, and thinner on the side surfaces where excessive thickness is not necessary. This local quality differentiation improves electrical connectivity while minimizing overall material consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of conductive lines with improved aspect ratios and reduced defects, ensuring reliable electrical connections and minimizing voids and seams, thus enhancing the integrity of semiconductor devices.
Implementation Method 1
forming a conductive layer on a bottom, a side, and an upper surface of the insulating interlayer where the trench is formed, using a first deposition process, wherein a thickness of the conductive layer formed on the bottom surface of the trench is greater than a thickness of the conductive layer formed on the side surface of the trench
Implementation Method 2
forming a sacrificial layer in the trench to cover the conductive layer formed on the bottom surface of the trench using a second deposition process different from the first deposition process
Data Source
AI summary
A method of manufacturing a semiconductor device includes: forming a trench in an insulating interlayer by etching the insulating interlayer; forming a conductive layer on bottom, side, and upper surfaces of the insulating interlayer where the trench is formed, using a first deposition process, the conductive layer on the bottom surface of the trench being thicker than the conductive layer on the side surface of the trench; forming a sacrificial layer in the trench covering the conductive layer formed on the bottom surface of the trench using a second deposition process different from the first deposition process; selectively removing the conductive layer formed on the upper surface of the insulating interlayer and formed on the side surface of the trench left exposed through the sacrificial layer; and selectively removing the sacrificial layer, to form a conductive line using the conductive layer remaining on the bottom surface of the trench.