Conductive Liner and Through Via for BSI Charge Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Backside illuminated (BSI) image sensor devices face issues with cross-talk and blooming due to insufficient isolation between neighboring pixels, leading to leakage currents and reliability degradation.
Innovation Solution
The implementation of a through via (TOV) coated with a dielectric layer to connect metallic structures across semiconductor chips, directing charges to ground and reducing leakage current, along with a conductive liner along the sidewall of the conductive plugs to ensure electrical connectivity and prevent charge accumulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing BSI image sensor fabrication methods are used, then manufacturing simplicity is maintained, but insufficient isolation between neighboring pixels causes cross-talk and blooming
Solution Approach 1:
The patent divides the semiconductor substrate into isolated pixel regions by introducing deep trench structures that physically segment the substrate. These trenches extend through the substrate thickness and are filled with insulating material, creating electrical isolation between neighboring pixels while maintaining the backside illumination structure.
Solution Approach 2:
The patent applies different material properties to different regions: the deep trenches are filled with insulating material specifically at pixel boundary regions where isolation is needed, while the active pixel regions maintain their original semiconductor properties for light sensing. This localized application of insulating material provides isolation only where required without affecting pixel performance.
2Area of moving object
If transistor devices are shrunk to reduce pixel size, then pixel density is improved, but cross-talk and blooming issues worsen due to insufficient isolation
Solution Approach 1:
Instead of relying on lateral isolation methods that become insufficient as pixel size shrinks, the patent transitions to vertical isolation by etching deep trenches that extend through the substrate thickness dimension. This vertical approach to isolation remains effective even as horizontal pixel dimensions decrease, enabling continued pixel density improvement without sacrificing isolation.
3Reliability
If deeper isolation structures are implemented, then cross-talk reduction is improved, but manufacturing complexity increases
Solution Approach 1:
The patent performs the deep trench etching operation before subsequent processing steps, establishing the isolation structure early in the fabrication sequence. This preliminary action allows the trench geometry to be defined and stabilized before additional layers are added, simplifying subsequent manufacturing steps compared to attempting to create similar isolation after device assembly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the electrical interconnection structure of BSI image sensor devices, reducing leakage currents and improving reliability by effectively directing charges to ground and preventing plasma-induced charge failures.
Implementation Method 1
a through via (TOV) coated with a dielectric layer to connect metallic structures across semiconductor chips, directing charges to ground and reducing leakage current
Implementation Method 2
a conductive liner along the sidewall of the conductive plugs to ensure electrical connectivity and prevent charge accumulation
Data Source
AI summary
A semiconductor device includes a first semiconductor chip comprising a first metallic structure and a second semiconductor chip comprising a second metallic structure. The second semiconductor chip is bonded with the first semiconductor chip by a first conductive plug. A second conductive plug extends from the first metallic structure and into a substrate of the first semiconductor chip. The first conductive plug connects the first metallic structure and the second metallic structure, wherein a conductive liner is along a sidewall of the first conductive plug or the second conductive plug.