Conductive Pad Control Layer for Metal Extrusion Suppression

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Solution Overview

Problem

Conductive features in semiconductor devices experience extrusion defects due to thermal expansion mismatches between different materials, leading to issues like short circuits.

Innovation Solution

A control layer is introduced between conductive layers to manage grain size and reduce thermal expansion, comprising elements like tantalum, titanium, and tungsten, with a crystalline mismatch to minimize grain size and stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive layers are formed from different materials to achieve desired electrical properties, then electrical performance is improved, but thermal expansion mismatch causes extrusion defects

Engineering Contradiction:
Improveelectrical performanceVSAvoidextrusion defects
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A control layer is introduced as an intermediary between the first and second conductive layers. This control layer has a crystalline structure with lattice parameters that create mismatch with both adjacent layers, thereby controlling grain size and reducing thermal expansion effects. The control layer acts as a buffer that mediates the thermal expansion mismatch between different conductive materials, preventing extrusion defects while maintaining electrical performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the crystalline structure parameters of the control layer to achieve desired grain size control. By selecting specific lattice parameters and crystalline orientations for the control layer, the thermal expansion behavior is modified to reduce mismatch with surrounding materials. This parameter change approach allows the control layer to minimize thermal stress and prevent extrusion during thermal processing.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If grain size is reduced to minimize thermal expansion, then thermal mismatch is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvethermal expansionVSAvoidmanufacturing complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The control layer is formed preliminarily between the conductive layers before final thermal processing. By pre-establishing the control layer with appropriate thickness and crystalline structure, the grain size is controlled in advance to minimize thermal expansion. This preliminary action prevents thermal mismatch issues before they occur during subsequent processing, rather than requiring complex real-time control during manufacturing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The control layer is positioned locally at the interface between different conductive layers where thermal expansion mismatch occurs. Rather than modifying the entire structure, the invention applies the control layer selectively at critical locations where grain size control is most needed. This local quality approach reduces thermal expansion problems at specific interfaces without requiring complex global manufacturing changes.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The control layer effectively reduces extrusion defects by controlling grain size, minimizing thermal expansion, and preventing stress-related failures in conductive pads.

Implementation Method 1

a control layer on the barrier layer. The control layer includes a composition having a crystalline structure that is mismatch with the composition in the subsequently formed conductive pad

Methodology Applied
Scientific EffectCrystalline mismatch: Crystallisation

Data Source

PatentUS20250323144A1Conductive structures and methods of fabrication thereof
Publication Date: 2025.10.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250323144A1 patent drawing
  • US20250323144A1 patent drawing
  • US20250323144A1 patent drawing

AI summary

Embodiments of the present disclosure relate to methods of fabricating conductive features to prevent metal extrusion. Particularly, the conductive feature includes a control layer to reduce grain size of a metal containing layer, thus obtaining a robust structure to decrease extrusion defects. In some embodiments, the control layer is formed between a barrier layer and the conductive feature. In some embodiments, the control layer is formed by adding a control element, such as oxygen, to an upper portion of the barrier layer.