Conductive Pad Routing Using Perimeter-Based Trace Placement
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Solution Overview
Problem
The semiconductor industry faces challenges in routing conductive traces between conductive pads due to dense inter-layer connections and signal integrity constraints, which can lead to increased power consumption and computational resources, especially when the distance between pads is either too small or too large, making it difficult to optimize routing efficiently.
Innovation Solution
An electronic design automation (EDA) tool determines a course between conductive pads based on their perimeters rather than center points, allowing for the efficient formation of conductive traces that extend perpendicular to this course, thereby optimizing the number and thickness of traces routed between pads, and adjusting their length and spacing to meet signal integrity requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conductive traces are routed between conductive pads using conventional center-point-based methods, then routing can be performed, but the complexity of routing increases and power consumption rises due to suboptimal trace placement
Solution Approach 1:
The patent changes the reference parameter for trace routing from center points to perimeters of conductive pads. By determining the course between pads based on their perimeters rather than centers, the system optimizes trace placement to minimize length and reduce routing complexity, thereby lowering power consumption without requiring fundamental changes to the routing infrastructure.
2Quantity of substance
If the distance between conductive pads is small, then integration density increases, but signal integrity constraints make routing difficult and increase power consumption
Solution Approach 1:
The patent applies local quality by adjusting trace spacing and length based on local conditions between pads. When pads are close together, the perimeter-based course determination allows traces to be optimally positioned with appropriate spacing to maintain signal integrity. The system locally adapts trace geometry to satisfy signal integrity constraints while maximizing integration density.
3Area of stationary object
If the distance between conductive pads is large, then routing space increases, but the number of traces required increases leading to increased power consumption
Solution Approach 1:
The patent changes the routing parameter from center-point distance to perimeter-based course distance. This parameter change allows for optimized trace placement that reduces the effective routing distance compared to center-point methods, thereby reducing the number of traces needed and lowering power consumption even when pads are spaced far apart.
4Ease of manufacture
If conventional center-point routing methods are used, then routing can be performed with simple geometry, but the number and thickness of traces cannot be optimized, leading to increased computational resources
Solution Approach 1:
The patent changes the geometric reference from center points to perimeters, which simplifies the routing determination process. By using perimeter-based course calculation, the system directly obtains optimized trace placement and dimensions without requiring complex iterative computations, thereby reducing computational resources while maintaining ease of implementation.
Data Source
AI summary
A semiconductor device is manufactured by a process including identifying a course extending between a minimum distance between a first perimeter of a first conductive pad and a second perimeter of a second conductive pad. The process can include forming a first conductive trace crossing the identified course. The first conductive trace can extend along a direction perpendicular to the course.