Conductive Pattern Manufacturing via Over-Etching and Reverse Offset Printing
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Solution Overview
Problem
Current methods for manufacturing conductive patterns with ultrafine line widths are limited by high costs and difficulties in achieving invisibility and high sensitivity, particularly in large-area touch screens, where ITO-based films face RC delay issues and visibility challenges.
Innovation Solution
A method involving the formation of a conductive film on a substrate, followed by an etching resist pattern with controlled line edge roughness, and subsequent over-etching to create a conductive pattern with a smaller line width, using reverse offset printing to achieve a surface resistance of 1 to 200 ohms and a line width of 0.1 to 10 micrometers, while maintaining an opening ratio of 85% to 98%.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography method is used to form thin line width conductive pattern, then manufacturing precision is improved, but device complexity and cost increase
Solution Approach 1:
The invention changes the etching parameters by controlling line edge roughness (LER) to be 0.1 to 5 micrometers, which enables precise conductive pattern formation without requiring complex photolithography equipment. This parameter optimization allows achieving thin line width with simpler manufacturing processes
Solution Approach 2:
The invention uses reverse offset printing to create a replica of the desired pattern through the etching resist, allowing the conductive pattern to be formed by over-etching rather than direct photolithography. This copying approach simplifies the manufacturing equipment while maintaining precision
2Reliability
If ITO-based conductive film is used for large area touch screen, then conductivity is improved, but recognition speed deteriorates due to RC delay
Solution Approach 1:
The invention creates conductive patterns with locally optimized properties by forming ultrafine line width structures (0.1 to 10 micrometers) that reduce overall capacitance while maintaining necessary conductivity in critical areas. This local optimization reduces RC delay without sacrificing essential conductivity
Solution Approach 2:
The invention changes the geometric parameters of the conductive structure by reducing line width to ultrafine dimensions and optimizing opening ratio (85% to 98%), which decreases the total capacitance and thus reduces RC delay, improving recognition speed while maintaining conductivity
3Ease of manufacture
If printing method is used to replace ITO, then cost is reduced, but manufacturing precision deteriorates making it difficult to form invisible ultrafine pattern
Solution Approach 1:
The invention optimizes the printing process parameters by controlling line edge roughness to 0.1 to 5 micrometers and using reverse offset printing technique, which enables formation of ultrafine conductive patterns (0.1 to 10 micrometers line width) with printing methods, achieving both cost reduction and manufacturing precision
Solution Approach 2:
The invention performs preliminary pattern formation on the etching resist through reverse offset printing before the actual etching process. This preliminary action allows the printing method to define the precise pattern geometry, which is then transferred to the conductive film through over-etching, achieving ultrafine precision with cost-effective printing
4Ease of manufacture
If conventional etching method is used, then manufacturing simplicity is maintained, but manufacturing precision deteriorates unable to achieve ultrafine line width
Solution Approach 1:
The invention changes the etching control parameters by specifying line edge roughness (LER) of 0.1 to 5 micrometers and implementing over-etching process, which enables conventional etching methods to achieve ultrafine line width (0.1 to 10 micrometers) while maintaining manufacturing simplicity
Data Source
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AI summary
The present invention provides a method for manufacturing a conductive pattern, comprising the steps of: a) forming a conductive film on a substrate; b) forming an etching resist pattern on the conductive film; and c) forming a conductive pattern having a smaller line width than a width of the etching resist pattern by over-etching the conductive film by using the etching resist pattern, and a conductive pattern manufactured by using the same. According to the exemplary embodiment of the present invention, it is possible to effectively and economically provide a conductive pattern having a ultrafine line width.