Semiconductor Conductive Pattern Step Reduction for Residue Prevention

Solution Overview

Problem

The conventional method of manufacturing flash memory devices results in residue formation during the anisotropic etching process, which blocks dopant implantation and increases the resistance of the word line, leading to delays in data writing.

Innovation Solution

A semiconductor device design that incorporates a step reduction pattern on the conductive patterns, where the top surface gradually decreases in height, preventing residue formation and allowing for uniform dopant implantation and reduced word line resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conventional flat conductive pattern is used, then the manufacturing process is simple, but residue forms during anisotropic etching which blocks dopant implantation and increases word line resistance

Engineering Contradiction:

Improveuniformity of dopant implantationVSAvoidcomplexity of conductive pattern structure

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The conductive pattern is designed with an asymmetric step structure where one end has a higher top surface than the other end. This asymmetric height difference prevents residue formation during anisotropic etching at the higher end, while maintaining a relatively simple overall structure that does not significantly increase manufacturing complexity

Inventive Principle:

Principle #4Asymmetry

Solution Approach 2:

The invention transitions from a two-dimensional flat conductive pattern to a three-dimensional stepped structure by introducing a height dimension. This dimensional change allows the top surface to decrease in height from one end to the other, creating a profile that prevents residue accumulation during etching while enabling complete dopant implantation

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Reliability

If the top surface of conductive pattern is flat, then the structure is simple to manufacture, but residue blocks dopant implantation causing increased resistance

Engineering Contradiction:

Improveword line resistanceVSAvoidease of forming conductive pattern

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The conductive pattern is designed with an asymmetric step structure where one end has a higher top surface than the other end. This asymmetric height difference prevents residue formation during anisotropic etching at the higher end, while maintaining a relatively simple overall structure that does not significantly increase manufacturing complexity

Inventive Principle:

Principle #4Asymmetry

Solution Approach 2:

The invention transitions from a two-dimensional flat conductive pattern to a three-dimensional stepped structure by introducing a height dimension. This dimensional change allows the top surface to decrease in height from one end to the other, creating a profile that prevents residue accumulation during etching while enabling complete dopant implantation

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Productivity

If conventional etching process is used on flat surface, then the process is simple, but residue formation delays data writing

Engineering Contradiction:

Improvedata writing speedVSAvoidcomplexity of conductive pattern structure

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The conductive pattern is designed with an asymmetric step structure where one end has a higher top surface than the other end. This asymmetric height difference prevents residue formation during anisotropic etching at the higher end, while maintaining a relatively simple overall structure that does not significantly increase manufacturing complexity

Inventive Principle:

Principle #4Asymmetry

Solution Approach 2:

The invention transitions from a two-dimensional flat conductive pattern to a three-dimensional stepped structure by introducing a height dimension. This dimensional change allows the top surface to decrease in height from one end to the other, creating a profile that prevents residue accumulation during etching while enabling complete dopant implantation

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents residue formation during the etching process, ensuring lower resistance in the word lines and improved data writing performance by allowing for complete dopant implantation and uniform metal silicide film formation.

Implementation Method 1

anisotropic etching is carried out over the insulation film 38, thereby remaining a sidewall spacer 38a over a side surface of the conductive pattern 35a

Methodology Applied

Scientific EffectAnisotropic etching:

Implementation Method 2

a dopant is implanted into the source, the drain, and the conductive pattern 35a

Methodology Applied

Scientific EffectDopant implantation: Ion Implantation

Implementation Method 3

a metal silicide film 43 is formed over the exposed surface of the conductive pattern 35a

Methodology Applied

Scientific EffectMetal silicide film formation:

Data Source

PatentUS8741760B2Method of manufacturing semiconductor device including first conductive pattern and second conductive pattern having top surface which decreases in height

Publication Date: 2014.06.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor device has a semiconductor substrate, a plurality of first conductive patterns, a second conductive pattern having a top surface of which stepwisely or gradually decreases in height in a direction from a side facing the first conductive pattern toward an opposite side, a first insulation film formed over the plurality of first conductive patterns and the second conductive pattern, and a third conductive pattern formed over the first insulation film.