Conductive Pillar Air Gap Prevents Residue Shorts

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Solution Overview

Problem

The challenge in semiconductor manufacturing is the re-deposition of conductive residues during the patterning process, which can lead to shorts between conductive layers and increased pattern widths, complicating the production of high-speed, low-power semiconductor memory devices like magnetic memory devices.

Innovation Solution

The method involves forming an air gap between the conductive layer and the substrate before patterning, using a sacrificial layer and mold insulating layers to create conductive pillars and prevent residue re-deposition, thereby reducing the likelihood of shorts and pattern width increases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional patterning process is used without air gap, then manufacturing process is simpler, but conductive residues re-deposit causing shorts between conductive layers

Engineering Contradiction:
Improveshort preventionVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a vertical air gap dimension between the conductive layer and substrate, transforming a 2D patterning problem into a 3D solution. The air gap physically separates the conductive layer from the substrate, preventing residue re-deposition that would cause shorts, while maintaining process simplicity through sequential layer formation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The air gap acts as an intermediary space between the conductive layer and substrate, preventing direct contact of conductive residues with the substrate. This intermediate region captures and isolates patterning residues, eliminating the shorting pathway without requiring complex additional structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If conventional patterning process is used without air gap, then manufacturing process is simpler, but pattern width increases due to residue re-deposition

Engineering Contradiction:
Improvepattern width controlVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

By introducing the vertical air gap dimension, the patent prevents lateral spread of conductive residues onto the substrate. The air gap confines patterning residues to the gap region, maintaining precise pattern widths in the horizontal plane without requiring additional patterning steps or materials.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If sacrificial layer and mold insulating layers are added to form air gap, then residue re-deposition is prevented, but manufacturing process becomes more complex

Engineering Contradiction:
Improveshort preventionVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The sacrificial layer and mold insulating layers are formed in advance before the conductive layer patterning step. This preliminary action creates the air gap structure beforehand, ensuring that when patterning occurs, residues cannot re-deposit onto the substrate. The sequential formation process integrates smoothly into existing manufacturing workflows.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The sacrificial layer is temporarily introduced to create the air gap structure, then removed after serving its purpose of defining the gap region. This temporary structure enables the air gap formation without requiring permanent complex fixtures or tools, maintaining manufacturing efficiency while achieving reliability improvements.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS10347819B2Magnetic memory devices having conductive pillar structures including patterning residue components
Publication Date: 2019.07.09 SAMSUNG ELECTRONICS CO LTD
  • US10347819B2 patent drawing
  • US10347819B2 patent drawing
  • US10347819B2 patent drawing

AI summary

Methods of manufacturing a semiconductor device include forming a conductive layer on a substrate, forming an air gap or other cavity between the conductive layer and the substrate, and patterning the conductive layer to expose the air gap. The methods may further include forming conductive pillars between the substrate and the conductive layer. The air gap may be positioned between the conductive pillars.