Conductive Post Fabrication for Semiconductor Dielectric Integrity

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Solution Overview

Problem

Wafer inspection using a probe machine can lead to residues on electrode pads, causing cracks in dielectric films during pad redistribution in semiconductor device fabrication, resulting in potential short-circuits and poor electric characteristics.

Innovation Solution

A method involving the formation of an electrically conductive post and interlayer dielectric film to bury residues, preventing exposure and thermal stress, which includes forming a semiconductor chip with an electrode, an electrically conductive post, and a redistribution layer extending over the interlayer dielectric film, ensuring good electric characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If wafer inspection using a probe machine is performed, then electric characteristics of semiconductor integrated circuits can be measured, but residues remain on electrode pads causing cracks in dielectric films

Engineering Contradiction:
Improveelectric characteristics measurementVSAvoiddielectric film integrity
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

A protective film is formed on the electrode pad surface before wafer inspection to prevent residue adhesion during probing. This preliminary protective measure ensures that subsequent dielectric film formation occurs on a clean surface, eliminating cracks while allowing prior electrical measurement

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The probe residues, which normally cause harmful effects, are converted into beneficial nucleation sites for dielectric film formation. By controlling the film deposition process, the residues serve as anchor points that improve film adhesion and coverage rather than causing defects

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Productivity

If probe needles contact electrode pads for wafer sort, then good or bad chips can be determined, but cracks and short-circuits occur in semiconductor chips

Engineering Contradiction:
Improvewafer sort efficiencyVSAvoidchip electrical integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A protective coating is applied to electrode pads before wafer inspection to prevent probe-induced damage. This allows efficient electrical testing and sorting to proceed while the protective layer prevents residue formation that would later cause dielectric film cracks and short-circuits

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective film acts as an intermediary layer between the probe needles and the electrode pads. It enables the probing process to occur without direct harmful contact, maintaining both the efficiency of wafer sorting and the integrity of the underlying chip structures

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Prevents cracks in dielectric films and maintains high electric characteristics of semiconductor devices even after wafer inspection, reducing yield loss and ensuring reliable semiconductor device performance.

Implementation Method 1

The metal interconnects are typically formed on patterned metal seed layers by electroplating

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS8183147B2Method of fabricating a conductive post on an electrode
Publication Date: 2012.05.22 LAPIS SEMICON CO LTD
  • US8183147B2 patent drawing
  • US8183147B2 patent drawing
  • US8183147B2 patent drawing

AI summary

A method of fabricating a semiconductor device includes: forming a semiconductor chip portion having an electrode on a main surface of a wafer; forming a first resist pattern having a first opening on the electrode; filling the first opening with a first electrically conductive material, thereby forming an electrically conductive post; removing the first resist pattern after said forming of the electrically conductive post; forming an interlayer dielectric film having a second opening positioned on the electrically conductive post; and forming an electrically conductive redistribution layer extending from an upper surface of the electrically conductive post over an upper surface of the interlayer dielectric film.