Semiconductor Package Layout With Conductive Posts for 3D Heat Dissipation
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Solution Overview
Problem
As semiconductor packages become more integrated and smaller in size to enhance performance, they face increased difficulties in securing effective heat dissipation, which is crucial for maintaining performance and reliability.
Innovation Solution
The semiconductor package design includes a first redistribution structure with alternately stacked layers and conductive posts connecting a semiconductor chip to a heat dissipation member, with additional semiconductor chips and redistribution structures to enhance heat dissipation while maintaining a compact form factor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the degree of integration of the semiconductor package is increased or the size is reduced to enhance performance, then circuit performance per unit volume is improved, but heat dissipation performance deteriorates
Solution Approach 1:
The patent transitions from planar heat dissipation to three-dimensional heat dissipation by stacking multiple semiconductor chips vertically. The heat dissipation member extends in the vertical direction (first direction) to contact multiple chips at different heights, enabling heat to be dissipated from multiple levels simultaneously. This dimensional transition allows improved heat dissipation performance while maintaining high integration density and small package size.
2Productivity
If multiple semiconductor chips are stacked to increase integration density, then productivity is improved, but device complexity increases
Solution Approach 1:
The heat dissipation member serves multiple functions simultaneously: it provides thermal management for multiple stacked semiconductor chips, acts as an electrical connection structure through embedded conductive posts, and serves as a mechanical support framework. The encapsulant also performs multiple roles including protection, insulation, and structural bonding. This multi-functionality reduces the need for separate components, thereby managing complexity while achieving high integration density.
Solution Approach 2:
The patent merges the heat dissipation function with the electrical connection function by integrating conductive posts within the heat dissipation member. The conductive posts serve both to electrically connect chips to the substrate and to provide thermal conduction paths. This merging of functions reduces the number of separate components and simplifies the overall package structure while maintaining high integration density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively secures heat dissipation performance, reduces the total height of the package, and increases integration density, allowing for efficient heat transfer and improved circuit performance per unit volume.
Implementation Method 1
a plurality of first conductive posts electrically connecting the first redistribution structure and the first semiconductor chip with each other
Implementation Method 2
a heat dissipation member having at least a portion that overlaps the first semiconductor chip in a second direction that is perpendicular to the first direction
Data Source
AI summary
A semiconductor package includes a first redistribution structure, a first semiconductor chip disposed on an upper surface of the first redistribution structure, an encapsulant disposed between the first redistribution structure and the first semiconductor chip, a plurality of first conductive posts electrically connecting the first redistribution structure and the first semiconductor chip with each other, and penetrating through the encapsulant in a first direction, a heat dissipation member having at least a portion that overlaps the first semiconductor chip in a second direction that is perpendicular to the first direction, and a second semiconductor chip disposed between the first redistribution structure and the heat dissipation member, and encapsulated by the encapsulant. The first semiconductor chip overlaps the plurality of first conductive posts in the first direction. The first semiconductor chip does not overlap the second semiconductor chip in the first direction.