Conductive Feature Sidewall Capping for Thermal-Stable Interconnects
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Solution Overview
Problem
The semiconductor industry faces challenges in reducing the resistance and improving the thermal stability of conductive features, such as vias and lines, during the fabrication of semiconductor devices.
Innovation Solution
The formation of conductive features is enhanced by selectively depositing a capping layer on the sidewalls of these features, which protects them from deformation during subsequent high-temperature process steps. Additionally, air gaps are introduced between conductive features to reduce capacitance and improve performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fabrication processes are used to form conductive features, then manufacturing simplicity is maintained, but resistance remains high and thermal stability deteriorates during high-temperature process steps
Solution Approach 1:
A capping layer is deposited on the sidewalls of conductive features before subsequent high-temperature fabrication steps. This preliminary protective action prevents deformation and maintains thermal stability during later processing, resolving the contradiction by preparing the structure in advance to withstand future thermal stress without requiring fundamental process changes
Solution Approach 2:
The capping layer is selectively applied only to the sidewalls of conductive features rather than uniformly across the entire substrate. This localized treatment provides targeted thermal protection where needed while maintaining manufacturing efficiency, balancing improved thermal stability with controlled fabrication complexity
2Productivity
If feature size is reduced to increase integration density, then more components can be integrated into a given area, but resistance of conductive features increases
Solution Approach 1:
The conductive feature structure is enhanced by adding a capping layer composed of different material properties than the core conductive material. This composite structure maintains the electrical conductivity of the core while the capping layer provides thermal protection, enabling smaller features to maintain low resistance even as dimensions are reduced to increase integration density
3Manufacturing precision
If conventional deposition methods are used without sidewall protection, then manufacturing simplicity is maintained, but conductive features deform during high-temperature process steps
Solution Approach 1:
The capping layer is deposited on conductive feature sidewalls before subsequent high-temperature fabrication steps. This preliminary protective action prevents deformation and maintains manufacturing precision during later processing without requiring fundamental changes to the deposition methodology
Solution Approach 2:
The capping layer acts as an intermediary protective barrier between the conductive feature sidewalls and the harsh high-temperature processing environment. This intermediate layer absorbs thermal stress and prevents direct damage to the conductive features, maintaining shape stability while using conventional deposition techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in conductive features with reduced resistance and improved thermal stability, leading to enhanced device performance, increased integration density, and improved yield.
Implementation Method 1
selectively depositing a capping layer on the sidewalls of the conductive features... which protects them from deformation during subsequent process steps
Implementation Method 2
isolating the conductive features... can reduce capacitance and improve performance
Data Source
AI summary
A method includes forming a conductive layer over a first dielectric layer; etching a recess in the conductive layer, wherein the recess exposes a top surface of the first dielectric layer; selectively depositing a capping layer on exposed sidewalls of the conductive layer within the recess; depositing a liner on the capping layer; forming a sacrificial material in the recess; and forming a second dielectric layer on the sacrificial material and on sidewalls of the recess; and after forming the second dielectric layer, performing a thermal process to remove the sacrificial material.