Conductive Stiffener for Chip Package Warpage and Interference

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Solution Overview

Problem

As circuitry increases in computational power and decreases in size, maintaining mechanical integrity of electrical contacts and preventing electrical interference between components becomes challenging due to warpage and mechanical deformities, as well as electromagnetic and radio-frequency interference.

Innovation Solution

An electrically conductive stiffener is positioned between the chip and the build-up layer, formed from materials like copper or stainless steel, which extends through electrical connections to shield the build-up layer from interference and maintain mechanical integrity by setting it to a reference voltage, such as ground, thereby reducing component-to-component interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If circuitry components are placed closer together to reduce size, then the form factor is reduced, but mechanical integrity of electrical contacts deteriorates due to warpage and deformities

Engineering Contradiction:
Improvepackage sizeVSAvoidmechanical integrity of electrical contacts
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

A stiffener layer is introduced as an intermediary component between the build-up layer and the chip to maintain mechanical integrity. The stiffener has a first portion extending beyond the chip perimeter to provide structural support and a second portion between the chip and build-up layer to maintain contact integrity, enabling closer component placement without compromising reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If components are placed closer together to reduce form factor, then productivity increases, but electrical interference between components increases

Engineering Contradiction:
Improvecomponent densityVSAvoidelectrical interference
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The stiffener layer serves as an electromagnetic shield between active components and the build-up layer containing electrical contacts. By positioning the stiffener between these elements, electromagnetic interference is blocked, allowing components to be placed closer together without increasing electrical interference.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The stiffener structure is designed with different portions serving different functions: a first portion extending beyond the chip perimeter provides mechanical support and shielding in peripheral areas, while a second portion between the chip and build-up layer provides localized electromagnetic shielding where electrical interference is most critical, enabling high component density with reduced interference.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If a stiffener extends only over a single chip, then manufacturing is simplified, but electrical interference shielding is insufficient in peripheral areas

Engineering Contradiction:
Improvestiffener fabricationVSAvoidelectrical interference in shadow areas
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The stiffener is designed with non-uniform geometry featuring a first portion extending beyond the chip perimeter and a second portion between the chip and build-up layer. This localized structural variation provides electromagnetic shielding in peripheral shadow areas without requiring a complete stiffener overlay, maintaining ease of manufacture while extending shielding coverage.

Inventive Principle:
Principle #3Local quality

4Strength

If a stiffener extends only over peripheral areas, then mechanical support is improved, but electrical interference shielding near the chip is insufficient

Engineering Contradiction:
Improvemechanical supportVSAvoidelectrical interference near chip
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The stiffener structure incorporates a second portion positioned between the chip and build-up layer to provide localized electromagnetic shielding where interference is most critical near the chip. Simultaneously, the first portion extends beyond the chip perimeter to provide mechanical support in peripheral areas, achieving both shielding and structural functions through spatially differentiated design.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The electrically conductive stiffener enhances the mechanical integrity of electrical contacts, reduces electromagnetic and radio-frequency interference, allows components to be positioned closer, and potentially decreases signal travel time by minimizing form factor, thus improving the overall performance and reliability of the chip package.

Implementation Method 1

the stiffener is formed from an electrically conductive material that at least partially shields the build-up layer from at least one of electromagnetic interference or radio-frequency interference produced by the chip

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentUS11227841B2Stiffener build-up layer package
Publication Date: 2022.01.18 INTEL CORP
  • US11227841B2 patent drawing
  • US11227841B2 patent drawing
  • US11227841B2 patent drawing

AI summary

To maintain the integrity of electrical contacts at a build-up layer of a chip package, while reducing electrical interference caused by a chip connected to the build-up layer, the chip package can include a stiffener formed from an electrically conductive material and positioned between the chip and the build-up layer. The chip can electrically connect to the build-up layer through electrical connections that extend through the stiffener. Compared with a stiffener that extends only over a single chip of the chip package, the present stiffener can help prevent warpage or other mechanical deformities that can degrade electrical contacts away from the chip at the build-up layer. Compared with a stiffener that extends only over an area away from the chip, such as a peripheral area, the present stiffener can help reduce electrical interference in an area of the build-up layer near the chip.