Encapsulated Conductive Substrate Routing for Fine-Pitch Packaging

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Current semiconductor packages face challenges in miniaturization and higher performance demands, requiring finer pitch conductive substrates that support multiple external interconnect structures while reducing manufacturing cycle time and being cost-effective.

Innovation Solution

A routable encapsulated conductive substrate structure with a surface finish layer, where the surface finish layer is formed at both initial and final stages of manufacturing, enabling efficient routing and enhanced connection reliability, and using the same material for resin layers to minimize warpage, supporting various interconnect schemes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional semiconductor packaging methods are used, then manufacturing simplicity is maintained, but manufacturing cycle time is extended and miniaturization requirements cannot be met

Engineering Contradiction:

Improvemanufacturing cycle timeVSAvoidstructure complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The conductive substrate structure is prepared in advance with surface finish layers formed at both initial and final stages of manufacturing, allowing routing and connection preparation to be completed before final assembly. This preliminary preparation reduces the overall manufacturing cycle time by eliminating sequential dependencies.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The manufacturing process is divided into distinct stages with the conductive substrate being prepared separately with multiple surface finish layers, then integrated into the final package. This segmentation allows parallel processing and reduces bottlenecks in the manufacturing flow.

Inventive Principle:

Principle #1Segmentation

2Volume of moving object

If finer pitch conductive substrates are used to support miniaturization, then device size is reduced, but manufacturing precision requirements increase and connection reliability becomes more difficult to maintain

Engineering Contradiction:

Improvepackage sizeVSAvoidconductive substrate precision

Core Design Contradiction:

Volume of moving objectVSManufacturing precision

Solution Approach 1:

Surface finish layers are applied at both initial and final stages of manufacturing, providing localized quality enhancement at critical interfaces. This ensures high precision and reliability at connection points while allowing the overall package to be miniaturized.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The conductive substrate structure combines multiple materials including conductive traces, resin layers, and surface finish layers (such as solder mask and solder plating). This composite structure provides both the mechanical integrity needed for fine pitch and the electrical performance required for high precision connections.

Inventive Principle:

Principle #40Composite materials

3Adaptability or versatility

If multiple external interconnect structures are integrated, then device functionality is enhanced, but structure complexity and manufacturing difficulty increase

Engineering Contradiction:

Improveinterconnect structure versatilityVSAvoidpackage structure complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The conductive substrate structure with surface finish layers formed at both initial and final stages serves multiple functions: it provides electrical connections, mechanical support, and routing pathways. This multi-functionality allows various external interconnect structures to be integrated without proportionally increasing overall package complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Ease of manufacture

If cost-effective manufacturing methods are used, then production cost is reduced, but manufacturing precision and connection reliability may be compromised

Engineering Contradiction:

Improvemanufacturing costVSAvoidconnection reliability

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

Surface finish layers are formed at both initial and final stages during the manufacturing process itself, rather than requiring separate post-assembly operations. This preliminary action ensures reliable connections while maintaining cost-effectiveness by integrating multiple functions into the base manufacturing flow.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS20240404902A1Semiconductor package having routable encapsulated conductive substrate and method

Publication Date: 2024.12.05 AMKOR TECH SINGAPORE HLDG PTE LTD

AI summary

A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.