Conductive Substrate Trenches for Die Packaging Heat Dissipation

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Solution Overview

Problem

Conventional die packaging processes are time-consuming and face challenges with heat dissipation in power chips due to wire bonding, which complicates the manufacturing of high-functionality electronic products with small sizes.

Innovation Solution

A method involving a conductive substrate with trenches, where dies are placed, and a conductive layer is formed with patterned photoresist and masks to create conductive bumps and electrodes, followed by an upper sealing layer, omitting wire bonding to simplify the process and enhance heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional wire bonding is used to provide electrical connection for power chip, then electrical connection is achieved, but heat dissipation becomes difficult

Engineering Contradiction:
Improveelectrical connectionVSAvoidheat dissipation
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent removes the wire bonding step entirely from the packaging process. Instead of using wire bonds to connect the power chip, the invention uses direct conductive connections through the substrate, extracting the harmful wire bonding element while maintaining electrical connectivity through an alternative pathway.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The substrate serves as an intermediary that provides both mechanical support and electrical connection. The conductive substrate with embedded conductors acts as a mediator between the power chip and external connections, eliminating the need for wire bonds while improving heat dissipation through the substrate's thermal conductivity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If conventional packaging process including die bonding, wire bonding and molding is used, then complete packaging is achieved, but the process becomes time-consuming

Engineering Contradiction:
Improvepackaging completenessVSAvoidmanufacturing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The conductive substrate is prepared in advance with embedded conductors and patterns formed before die attachment. The conductive layer is deposited and patterned on the substrate prior to mounting the power chip, allowing subsequent steps to proceed more quickly without compromising packaging completeness.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent combines multiple functions into the substrate structure itself. The substrate provides mechanical support, electrical connection, and heat dissipation pathways simultaneously. The conductive layer serves both as an electrical conductor and as part of the sealing structure, merging functions that would traditionally require separate components and steps.

Inventive Principle:
Principle #5Merging (Combining)

3Volume of moving object

If die packaging size is decreased for small size electronic products, then product size is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvepackage sizeVSAvoidalignment precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The conductive substrate has different properties in different regions: the embedded conductors provide localized electrical pathways, the patterned conductive layer provides both electrical connection and structural support, and the sealing layer provides protection. This local differentiation of material properties and functions allows compact packaging while maintaining manufacturing feasibility.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method simplifies the die packaging process, reduces heat dissipation issues, and allows for miniaturization of the die package structure, improving manufacturing efficiency and performance.

Implementation Method 1

forming a copper seed layer by using electroless plating

Methodology Applied
Scientific EffectElectroless plating: Electroplating

Implementation Method 2

forming a copper plating layer on the copper seed layer by using electroplating

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS11264355B2Method of manufacturing die package structure
Publication Date: 2022.03.01 COMCHIP TECH
  • US11264355B2 patent drawing
  • US11264355B2 patent drawing
  • US11264355B2 patent drawing

AI summary

A method of manufacturing a die package structure includes steps described below. A conductive substrate with a plurality of trenches is provided. A die is disposed in each of the trenches. A conductive layer is formed covering the dies and the conductive substrate. A patterned photoresist layer with a plurality of openings is formed exposing a plurality of areas of the conductive layer. A mask is formed on each of the areas of the conductive layer. The patterned photoresist layer is removed after forming the masks. By using the masks, the conductive layer and the conductive substrate under thereof are selectively etched to a predetermined depth to form a plurality of conductive bumps and a plurality of electrodes, in which a remaining of the conductive substrate includes a bottom substrate, the electrodes and the conductive bumps. An upper sealing layer is formed covering the bottom substrate and the dies.