Conductive Trace Lock Structure for Package Delamination Control

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Solution Overview

Problem

Conventional electronic device packages face delamination issues due to coefficient of thermal expansion (CTE) mismatch between materials, leading to stress and reliability concerns during thermal cycles.

Innovation Solution

Incorporating a stress barrier structure, comprising a protrusion portion on the conductive trace and a recession portion on the passivation layer, which interlock to form a lock configuration, effectively mitigating stress propagation and alleviating delamination by redirecting stress greater than 90 degrees.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional electronic device package structures are used, then manufacturing is simpler, but delamination occurs due to CTE mismatch stress during thermal cycles

Engineering Contradiction:
Improveresistance to delaminationVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductive trace is segmented into a body portion and a cap portion, where the cap portion protrudes from the hole and is wider than the body portion. This segmentation creates a stress barrier structure that interrupts stress propagation paths, preventing delamination while maintaining overall structural integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The conductive trace transitions from a simple planar configuration to a three-dimensional structure with the cap portion extending outward from the hole. This dimensional change creates a protrusion that redirects stress greater than 90 degrees, effectively blocking stress propagation between the substrate and passivation layer.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If excessive electroplating is used to form protrusion portion, then stress barrier effect is improved, but manufacturing precision control becomes more difficult

Engineering Contradiction:
Improvestress barrier effectVSAvoidelectroplating control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A sacrificial layer is introduced as an intermediary element during manufacturing. The sacrificial layer defines the hole structure, and electroplating is performed within this constrained geometry. After electroplating creates the desired protrusion, the sacrificial layer is removed, leaving a precisely controlled conductive trace with cap portion. This intermediary approach enables better control over the final geometry compared to direct electroplating without a sacrificial layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The stress barrier structure significantly reduces delamination between the conductive trace and the passivation layer, enhancing the yield and reliability of electronic device packages by managing thermal stress effectively.

Implementation Method 1

A conductive material is electroplated in the hole of the sacrificial layer to form a conductive trace

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS12094772B2Electronic device package and method of manufacturing the same
Publication Date: 2024.09.17 ADVANCED SEMICON ENG INC
  • US12094772B2 patent drawing
  • US12094772B2 patent drawing
  • US12094772B2 patent drawing

AI summary

An electronic device package and a method for manufacturing the same are provided. The electronic device package includes a substrate, a conductive trace, a passivation layer and an upper wiring. The conductive trace is disposed over the substrate. The conductive trace includes a body portion disposed on the substrate, and a cap portion disposed on the body portion, and the cap portion is wider than the body portion. The passivation layer covers the conductive trace. The upper wiring is disposed on the passivation layer and electrically connected to the cap portion of the conductive trace through an opening of the passivation layer.