Conductive Underfill Ground Bumps for Dense IC Return Paths
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Solution Overview
Problem
The challenge in IC packages is to ensure proper impedance of high-speed I/O return paths due to densely positioned VSS/VDD and I/O pins, which is crucial for maintaining optimal system performance in constrained mobile device sizes.
Innovation Solution
The implementation of a conductive underfill coupled to VSS pins and insulated non-VSS pins through an insulating layer, such as silicon dioxide, within an IC package structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If pins are densely positioned to increase pin density, then the computational capacity and function blocks can be increased within constrained device sizes, but the impedance control of high-speed I/O return paths becomes difficult to maintain
Solution Approach 1:
The patent segments the pins into two distinct groups: VSS pins (ground pins) and non-VSS pins (signal pins). This segmentation allows for differentiated treatment where VSS pins provide dedicated return paths for high-speed signals while non-VSS pins handle data transmission. By separating ground and signal functions into distinct pin groups, the patent maintains proper impedance control even with high pin density.
Solution Approach 2:
The patent applies local quality by providing specialized conductive underfill material specifically at the locations of VSS pins, while non-VSS pins receive insulating layers. This localized differentiation ensures that high-speed signal return paths have optimal electrical characteristics through the conductive underfill, while other areas maintain electrical isolation. The local application of different materials (conductive vs. insulating) resolves the impedance control issue in densely packed configurations.
2Productivity
If VSS pins and non-VSS pins are densely positioned close to each other, then pin density increases, but electrical isolation between signal pins and ground pins becomes challenging
Solution Approach 1:
The patent applies local quality by providing specialized conductive underfill material specifically at the locations of VSS pins, while non-VSS pins receive insulating layers. This localized differentiation ensures that high-speed signal return paths have optimal electrical characteristics through the conductive underfill, while other areas maintain electrical isolation. The local application of different materials (conductive vs. insulating) resolves the impedance control issue in densely packed configurations.
Solution Approach 2:
The conductive underfill acts as an intermediary element between the VSS pins and the substrate, providing a controlled electrical path for ground return signals. Meanwhile, insulating layers serve as intermediaries between non-VSS pins and the substrate, preventing unwanted electrical connections. These intermediary materials enable dense pin positioning while maintaining proper electrical isolation and signal integrity.
Data Source
AI summary
In an aspect, an integrated circuit (IC) device includes a substrate having a non-conductive film disposed on a first surface, a die having a plurality of pins including VSS pins and non-VSS pins having an insulating layer, wherein the plurality of pins is coupled to the substrate through the non-conductive film, and a conductive underfill disposed between the die and the substrate, wherein the conductive underfill is coupled to the VSS pins.