Conductive Via Exposure Using Barrier Stop Layers
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Solution Overview
Problem
Existing methods for exposing conductive vias in semiconductor devices face challenges such as varying via lengths and substrate thickness, leading to inconsistent exposure and potential damage to vias and substrates during the process.
Innovation Solution
The method involves conformally forming a barrier material over conductive vias, followed by the deposition of a self-planarizing isolation material. This sequence allows for controlled removal of materials to expose the vias, with the exposure of laterally extending portions of the barrier material serving as a signal to stop the material removal process, ensuring all vias are exposed without damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If material removal is performed to expose conductive vias, then via exposure is achieved, but damage to vias and substrate may occur due to varying via lengths and substrate thickness
Solution Approach 1:
A barrier layer is deposited over the backside surface before material removal to protect the substrate and via structures during the exposure process. This preliminary protective action prevents damage while allowing controlled via exposure
Solution Approach 2:
The barrier layer acts as an intermediary between the material removal process and the underlying substrate/via structures. It enables the removal process to proceed without directly contacting and potentially damaging the sensitive conductive vias and substrate
2Reliability
If barrier layer and isolation material are deposited to protect substrates and vias, then protection is improved, but process complexity increases
Solution Approach 1:
The barrier layer serves multiple functions simultaneously: it protects the substrate from contamination, prevents metal diffusion, and provides a protective overlay during subsequent material removal processes. This multi-functionality reduces the need for separate protective measures
3Manufacturing precision
If conventional material removal is used to expose vias, then via exposure is achieved, but control over the exposure process is reduced
Solution Approach 1:
The lateral extension of the barrier layer provides a visual and physical indicator that feeds back to the process control system. When the barrier layer laterally extends during material removal, it signals that via exposure is complete, enabling automatic process termination and precise control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures that all conductive vias are properly exposed for electrical connection, reduces the risk of damage to the vias and substrate, and enhances process control, thereby improving the reliability and quality of semiconductor device fabrication.
Implementation Method 1
a barrier material, which may comprise silicon nitride (e.g., Si3N4), may be deposited over the backside surface 112 and the exposed portion of the conductive via 108, including the associated spacer oxide shell 109, using a conformal deposition process, such as, for example, a chemical vapor deposition (CVD) or physical vapor deposition (PVD) process
Implementation Method 2
A self-planarizing isolation material may be formed over the barrier material
Data Source
AI summary
Methods of exposing conductive vias of semiconductor devices may involve positioning a barrier material over conductive vias extending from a backside surface of a substrate to at least substantially conform to the conductive vias. A self-planarizing isolation material may be positioned on a side of the barrier material opposing the substrate. An exposed surface of the self-planarizing isolation material may be at least substantially planar. A portion of the self-planarizing isolation material, a portion of the barrier material, and a portion of at least some of the conductive vias may be removed to expose each of the conductive vias. Removal may be stopped after exposing at least one laterally extending portion of the barrier material proximate the substrate.