Conductive Via Grain Control via Periodic Electroplating
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The manufacturing of semiconductor devices faces challenges such as delamination, cracking, and high yield loss due to non-uniform grain growth of electroplated conductive materials, which leads to instability and failure of the semiconductor structure.
Innovation Solution
The introduction of a low pulse current during electroplating operations creates an interface between conductive via portions with different average grain sizes, controlling grain growth and preventing protrusion, thereby ensuring a smooth surface for subsequent layers and enhancing adhesion and electrical connection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional electroplating operations are used to deposit conductive material, then the conductive via is formed, but non-uniform grain growth occurs causing delamination, cracking, and high yield loss
Solution Approach 1:
The patent applies periodic action by implementing multi-stage electroplating operations with alternating current densities. The process uses high current density stages followed by low current density stages, creating periodic variations in deposition conditions that control grain growth patterns and prevent non-uniformity throughout the conductive via.
Solution Approach 2:
The patent employs parameter changes by systematically varying electroplating parameters including current density, temperature, and plating time across different stages. These parameter modifications enable precise control over grain size and distribution, transforming the uniform grain structure throughout the conductive via and eliminating delamination and cracking issues.
2Productivity
If high current density is used throughout electroplating, then deposition speed is high, but grain growth becomes non-uniform causing humps and hillocks
Solution Approach 1:
The patent applies segmentation by dividing the electroplating process into multiple distinct stages with different current density parameters. This segmentation allows the deposition process to be controlled in phases, achieving both high overall deposition speed and uniform surface morphology by preventing uncontrolled grain growth at any single stage.
Solution Approach 2:
The patent uses periodic action through alternating high and low current density stages. The high current density stages provide rapid deposition when the via is smaller, while low current density stages prevent grain protrusion and maintain surface uniformity as the via fills, creating a periodic pattern that balances speed and quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a stable semiconductor structure with improved reliability and reduced defects, minimizing the formation of humps and hillocks, and enhancing the overall performance and yield of semiconductor devices.
Implementation Method 1
disposing a conductive material in the recess to form a conductive via
Data Source
AI summary
A method of manufacturing a semiconductor structure includes receiving a substrate including a first side and a second side opposite to the first side; forming a recess extending between the first side and the second side; and disposing a conductive material in the recess to form a conductive via, wherein the conductive via includes an interface, a first portion adjacent to the first side and a second portion adjacent to the second side, the interface is disposed between the first portion and the second portion, an average grain size of the first portion is substantially different from an average grain size of the second portion.