Cone-Shaped Solder Layers for Semiconductor Package Reliability
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Solution Overview
Problem
Lead-free solder bumps in semiconductor manufacturing are brittle, prone to cracking, and experience stress due to mismatched thermal expansion coefficients between chips and substrates, leading to reliability issues and contamination concerns, with existing underfills providing insufficient protection.
Innovation Solution
A semiconductor package structure featuring cone-shaped solder layers on bumps, with the second solder layers being accommodated within the first, and an encapsulation between substrates, reducing spacing and thickness, enhancing reliability and reducing contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If lead-free solder bump is used in manufacturing process, then contamination is reduced, but brittleness increases and crack phenomenon occurs
Solution Approach 1:
The patent uses a composite solder layer structure consisting of a first solder layer (e.g., Sn-Pb alloy) and a second solder layer (e.g., Pb-free alloy) formed on bumps. This composite structure combines the low-contamination advantage of Pb-free solder with the ductility and stress-absorption capabilities of traditional solder materials, thereby maintaining reliability while reducing contamination.
Solution Approach 2:
The patent introduces an underfill material between the chip and substrate before final assembly. This underfill acts as a cushioning layer that absorbs thermal expansion stress and prevents crack propagation in the solder joints, thereby protecting the brittle Pb-free solder bumps from failure while maintaining the contamination-reduction benefit.
2Ease of manufacture
If conventional solder layers are used, then manufacturing is simple, but stress from thermal expansion mismatch causes reliability issues
Solution Approach 1:
The patent changes the material composition parameters of the solder layers. The first solder layer uses a eutectic or near-eutectic Sn-Pb alloy with specific composition ratios, while the second solder layer uses a Pb-free alloy with controlled composition. These parameter changes enable the solder structure to accommodate thermal expansion mismatch while maintaining manufacturability through established processing techniques.
Solution Approach 2:
The patent divides the solder connection into multiple segments: a first solder layer directly on the bump, a second solder layer on top of the first, and an underfill material between the chip and substrate. This segmentation allows each layer to perform specific functions - the first layer provides strong bonding, the second layer provides stress relief, and the underfill provides additional mechanical support and thermal management.
3Reliability
If present underfill is used, then chip is protected, but protection for lead-free solder bump is insufficient
Solution Approach 1:
The patent applies local quality by creating a specialized solder structure at the critical bump locations rather than uniformly protecting the entire chip. The first and second solder layers are formed only at the bump sites where stress concentration occurs, providing targeted protection where needed most while keeping the rest of the structure simple and maintaining ease of manufacture.
Data Source
AI summary
A semiconductor package structure includes a first substrate, a second substrate and an encapsulant. The first substrate comprises a plurality of first bumps and a plurality of first solder layers. Each of the first solder layers is formed on each of the first bumps and comprises a cone-shaped slot having an inner surface. The second substrate comprises a plurality of second bumps and a plurality of second solder layers. Each of the second solder layers is formed on each of the second bumps and comprises an outer surface. Each of the second solder layers is a cone-shaped body. The second solder layer couples to the first solder layer and is accommodated within the first solder layer. The inner surface of the cone-shaped slot contacts with the outer surface of the second solder layer. The encapsulant is formed between the first substrate and the second substrate.