Scalable Configuration Apertures for Multi-Ported Switches

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Solution Overview

Problem

Conventional computer systems, such as those using PCI and PCI Express Base architectures, face limitations in configuration register space, particularly when dealing with multi-ported switch devices, which necessitate workarounds like memory or I/O mapped spaces to fully configure components, leading to inefficiencies.

Innovation Solution

The implementation of a scalable configuration space organized into segregated apertures, each accessible using a 32-bit index, allowing for up to 4 gigabytes of memory size, and enabling aperture-by-aperture access control, thereby overcoming the limitations of traditional architectures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional PCI or PCI Express Base architecture configuration registers are used, then device configuration can be implemented with limited space (256 bytes to 4 kilobytes), but the configuration space is insufficient for multi-ported switch devices requiring more extensive configuration registers

Engineering Contradiction:
Improveconfiguration space sizeVSAvoidscalability for multi-ported switch devices
Core Design Contradiction:
Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The configuration space is divided into multiple 32-bit apertures that can be individually accessed and configured. Each aperture represents a segment of the total configuration space, allowing the system to manage large configuration requirements by breaking them into manageable 32-bit segments rather than requiring a single large continuous space.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension to configuration space addressing by organizing it as an array of 32-bit apertures indexed by 32-bit indices. This dimensional reorganization allows access to vastly larger configuration spaces (up to 4 gigabytes) compared to traditional flat configuration registers, enabling multi-ported switch devices to access extensive configuration data efficiently.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If configuration space is extended to 4 kilobytes in PCI Express Base architecture, then more configuration registers are available, but Advanced Switching architecture still requires more scalability for multi-ported switch devices

Engineering Contradiction:
Improveconfiguration register spaceVSAvoidconfiguration mechanism complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The configuration mechanism is segmented into multiple 32-bit apertures that can be independently accessed. This segmentation allows the system to handle large configuration spaces by processing them in manageable 32-bit chunks rather than requiring complex handling of large continuous memory spaces, simplifying the overall configuration mechanism while providing extensive capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the fundamental parameters of configuration space organization from traditional byte-addressable registers to 32-bit aperture-based indexing. This parameter change enables the system to access gigabytes of configuration space using simple 32-bit indices, avoiding the need for complex memory mapping or I/O transaction mechanisms while providing vast configuration capacity.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If memory or I/O mapped space is used to request additional configuration register space, then configuration space can be expanded, but separate configuration transactions are required leading to inefficiency

Engineering Contradiction:
Improveconfiguration space capacityVSAvoidconfiguration transaction efficiency
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent merges the configuration space access mechanism with the existing 32-bit address bus infrastructure. By organizing configuration space as accessible 32-bit apertures that align with the natural word size of the system bus, the invention eliminates the need for separate configuration transactions and allows configuration access to occur efficiently through standard 32-bit memory or I/O operations already present in the system.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The invention changes the addressing parameters to use 32-bit indices for aperture selection, which aligns with the system's native 32-bit word size. This parameter alignment allows configuration space to be accessed using standard 32-bit transactions without requiring special configuration cycles or separate transaction types, thereby improving configuration efficiency while providing extensive configuration capacity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7447208B2Configuration access mechanism for packet switching architecture
Publication Date: 2008.11.04 INTEL CORP
  • US7447208B2 patent drawing
  • US7447208B2 patent drawing
  • US7447208B2 patent drawing

AI summary

A method for accessing a configuration space of a device is described. The method includes setting a first field of a packet to a value to specify a destination device, and setting a second field of the packet to a defined value to indicate that the packet is a configuration access packet. The method further includes setting a third field of the configuration access packet to a value to select one of a plurality of configuration apertures of a configuration space of the destination device, and setting a fourth field of the configuration access packet to a value to address a specific memory location within the selected aperture.