Configurable Arithmetic Unit for Cryptographic Operations
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Solution Overview
Problem
General purpose processors are inefficient for error correction and cryptography due to high computational costs, especially when dealing with larger sets of parameters, while dedicated hardware accelerators lack coding flexibility and are costly.
Innovation Solution
A configurable arithmetic unit within processors that supports operations on Galois fields, providing both coding flexibility and integrated circuit die area and energy efficiency by using a combination of multiplication and squaring units, programmable control logic, and a configuration register to perform various cryptographic and error correction operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If general purpose processors are used for error correction and cryptography operations, then coding flexibility is maintained, but computational cost and energy consumption increase significantly
Solution Approach 1:
The arithmetic unit is segmented into specialized functional components: multiplication units, squaring units, and configuration registers. This segmentation allows each component to be optimized for specific cryptographic operations, achieving hardware-level efficiency while maintaining flexibility through configurable interconnections.
Solution Approach 2:
The arithmetic unit employs dynamic reconfiguration through control logic that can be programmed to perform different operations (multiplication, squaring, inversion) based on the specific cryptographic algorithm required. This dynamic adaptability enables the same hardware to efficiently execute various protocols without requiring dedicated fixed hardware for each operation.
2Use of energy by moving object
If dedicated hardware accelerators are used for cryptographic operations, then energy efficiency and computational performance improve, but device complexity and production cost increase
Solution Approach 1:
The arithmetic unit is designed as a universal accelerator that can perform multiple cryptographic functions (error correction, cryptography, finite field operations) using the same set of multiplication and squaring units. This multi-functionality eliminates the need for separate dedicated hardware for each operation, reducing overall device complexity while maintaining energy efficiency.
Solution Approach 2:
The unit utilizes configurable parameters stored in registers to define the specific arithmetic operations and data types. By changing these parameters through software control, the same hardware can adapt to different cryptographic algorithms, avoiding the complexity of implementing all possible algorithms in fixed hardware.
3Productivity
If dedicated hardware accelerators are implemented, then computational performance for cryptographic operations improves, but manufacturing cost increases
Solution Approach 1:
The dynamic reconfigurable architecture allows a single standardized hardware design to serve multiple cryptographic applications. This reduces the need for custom-designed dedicated hardware for each protocol, thereby lowering manufacturing costs while maintaining high computational performance through optimized arithmetic units.
Solution Approach 2:
Instead of manufacturing separate dedicated hardware for each cryptographic function, the design uses software-based configuration to create virtual copies of different functional behaviors within the same physical hardware. This approach maintains performance through hardware-level optimization while reducing manufacturing complexity and cost.
Data Source
AI summary
Subject matter disclosed herein may relate to arithmetic units of processors, and may relate more particularly to configurable arithmetic units. Configurable arithmetic units may comprise a plurality of basic units, and may further comprise a programmable fabric to selectively connect the plurality of basic units at least in part to process one or more sets of parameters in accordance with one or more specified arithmetic operations.