Configurable CAM Architecture for Search Speed and Cost
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Solution Overview
Problem
Content addressable memories (CAMs) are costly due to additional circuitry required for comparison and power dissipation, limiting their use to specialized applications, and previous attempts to integrate CAM functionality into general-purpose programmable logic devices have not been commercially successful due to limited width variations and high manufacturing costs.
Innovation Solution
An integrated circuit (IC) with configurable content addressable memories (CAMs) that subdivides memory arrays into banks with supporting circuitry, uses hashing functions to reduce search scope, and incorporates reconfigurable circuits to perform operations at multiple clock cycles, allowing for wider application support and reduced costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If CAM is used to provide fast search capability, then search speed is improved, but manufacturing cost and power dissipation increase
Solution Approach 1:
The memory array is divided into multiple banks, with each bank containing multiple sets of memory cells. Each set has its own comparison circuitry, allowing parallel search operations across multiple sets while reducing the burden on any single circuit. This segmentation enables fast search capability to be achieved in a distributed manner, reducing the cost and power consumption of any single comparison unit.
Solution Approach 2:
The patent implements reconfigurable circuits that can dynamically change their function and configuration based on the search requirements. The device can reconfigure on the fly at multi-GHz rates, allowing the same hardware to adapt to different search widths and patterns. This dynamic reconfiguration enables a single device to provide fast CAM search for multiple different application scenarios, amortizing the high cost across many uses.
2Speed
If CAM is used to provide fast search capability, then search speed is improved, but power dissipation increases
Solution Approach 1:
By dividing the memory into banks and sets, the comparison operations are distributed across multiple smaller units. Each set's comparison circuit only needs to compare against a portion of the total memory, reducing the instantaneous power consumption of any single comparison unit. The parallel operation of multiple low-power units achieves the same overall search speed as a single high-power unit would provide.
Solution Approach 2:
The patent employs periodic clocking and reconfiguration at multi-GHz rates, allowing the system to perform search operations in discrete time steps. This periodic operation enables power management strategies where comparison circuits are activated only when needed for specific search operations, rather than continuously, thereby reducing average power dissipation while maintaining fast search capability when required.
3Ease of manufacture
If fixed-width CAM is used, then manufacturing cost is reduced, but adaptability to different applications decreases
Solution Approach 1:
The patent implements reconfigurable circuits that can dynamically change their configuration to support different search widths and patterns. The device can be reconfigured on the fly at multi-GHz rates to adapt to different application requirements, whether 16-bit, 32-bit, or other widths. This dynamic reconfigurability allows a single fixed physical device to provide CAM functionality across a wide range of application scenarios, achieving high adaptability without requiring multiple different fixed-width CAM designs.
Solution Approach 2:
The patent creates a universal CAM device that can perform multiple functions through reconfiguration. The same physical hardware can be configured to support exact match, partial match, wildcard search, and different data widths by reprogramming the reconfigurable circuits. This multi-functionality allows the device to serve as a universal solution for various application needs, from network routing tables to database indexing, without requiring application-specific custom designs.
4Adaptability or versatility
If reconfigurable circuits are added to support wide variety of applications, then adaptability is improved, but device complexity increases
Solution Approach 1:
The reconfigurable functionality is segmented into modular units distributed across the memory banks and sets. Each segment can be independently configured and controlled, allowing complex reconfiguration logic to be broken down into manageable pieces. This modular segmentation of reconfigurability reduces the complexity of controlling and managing the reconfigurable circuits compared to a monolithic reconfigurable system.
Solution Approach 2:
The patent merges the reconfigurable logic with the existing memory structure, integrating configuration control into the memory control pathways. The reconfigurable circuits are combined with the comparison logic and address decoding, allowing multiple functions to be achieved through shared hardware resources. This merging reduces overall device complexity by eliminating separate dedicated reconfiguration units and utilizing existing circuitry for multiple purposes.
Data Source
AI summary
An integrated circuit (IC) that includes content addressable memories (CAM) is described. A CAM receives a key and searches through entries stored in the CAM for one or more entries that match the key. If a matching entry is found, the IC returns a storage address indicating a memory location at which the matching was found.