Configurable Comparator Circuit for Bandwidth and Power Switching
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Solution Overview
Problem
Existing automated test systems for electronic devices are often large, power-consuming, and costly, failing to provide high fidelity performance across both low power and high speed test modes efficiently.
Innovation Solution
A multiple-mode comparator system with a gain stage that maintains constant gain characteristics across different power and speed settings, incorporating an adjustable impedance device to influence bandwidth and an output stage with a buffer circuit that adapts to operating modes for shared output pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a traditional automated test system is used to provide high fidelity performance, then testing accuracy is improved, but power consumption increases and system size increases
Solution Approach 1:
The comparator circuit dynamically switches between two operating modes (high-speed mode and low-power mode) based on testing requirements. In high-speed mode, the circuit provides high fidelity performance with increased power consumption, while in low-power mode, it reduces power consumption for less demanding applications. This dynamic adaptation allows the system to optimize the trade-off between power consumption and testing accuracy.
2Speed
If a high-speed comparator mode is used, then bandwidth is improved, but power consumption increases
Solution Approach 1:
The comparator circuit changes its operating parameters by switching between two distinct modes. The high-speed mode configures the circuit for maximum bandwidth with higher power consumption, while the low-power mode reconfigures the circuit to reduce power consumption at the expense of reduced bandwidth. This parameter switching allows optimization based on specific testing requirements.
3Adaptability or versatility
If separate output circuits are used for low-power and high-speed modes, then mode-specific optimization is improved, but device complexity increases
Solution Approach 1:
The patent combines the output circuits for both low-power mode and high-speed mode into a single shared output structure. Instead of providing separate output circuits for each mode, the invention merges them so that both modes can utilize the same output pins and downstream circuitry. This reduces device complexity while maintaining the ability to optimize for different operating modes.
Solution Approach 2:
The shared output circuit is designed to be universal, serving both low-power mode operations and high-speed mode operations. This multi-functional output structure eliminates the need for separate dedicated output circuits for each mode, thereby reducing overall device complexity while maintaining adaptability to different testing requirements.
Data Source
AI summary
A multiple operating-mode comparator system can be useful for high bandwidth and low power automated testing. The system can include a gain stage configured to drive a high impedance input of a comparator output stage, wherein the gain stage includes a differential switching stage coupled to an adjustable impedance circuit, and an impedance magnitude characteristic of the adjustable impedance circuit corresponds to a bandwidth characteristic of the gain stage. The comparator output stage can include a buffer circuit coupled to a low impedance comparator output node. The buffer circuit can provide a reference voltage for a switched output signal at the output node in a higher speed mode, and the buffer circuit can provide the switched output signal at the output node in a lower power mode.