Configurable Compression Accelerator for Smaller Multi-Algorithm Chips

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Solution Overview

Problem

Existing microprocessors require larger chip sizes due to the need for multiple compression hardware accelerators for different algorithms, which is inefficient and increases size, whereas software-based optimization for string matching methods performs worse than hardware-based solutions.

Innovation Solution

A configuration logic for a compression accelerator that configures hardware between buffers to form a data transmission path, allowing different compression algorithms to reuse hardware components, thereby reducing the need for multiple accelerators and minimizing microprocessor size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple compression hardware accelerators are provided for different algorithm types, then compression performance for various formats is improved, but microprocessor chip size increases

Engineering Contradiction:

Improvecompression performanceVSAvoidchip size

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

The patent implements a universal compression accelerator that can handle multiple compression algorithms (ZLIB, GZIP, LZS, LZ4, LZO) through a single hardware unit. The configuration logic dynamically configures the hardware components to support different algorithm types, allowing one accelerator to perform the functions of multiple dedicated accelerators, thereby reducing chip size while maintaining compression performance across various formats

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs dynamic configuration of hardware components based on the input parameter indicating the compression algorithm type. The configuration logic adjusts the data transmission path and device settings in real-time to match the required algorithm, enabling the same hardware to adaptively serve multiple compression formats without requiring separate static hardware for each algorithm

Inventive Principle:

Principle #15Dynamics

2Adaptability or versatility

If software-based optimization is used for string matching methods, then implementation flexibility is improved, but processing performance deteriorates

Engineering Contradiction:

Improveimplementation flexibilityVSAvoidprocessing performance

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent replaces software-based string matching with hardware-based string matching algorithms implemented in the compression accelerator. The hardware accelerator uses dedicated logic circuits to perform string matching operations, providing significantly higher processing performance compared to software implementation while maintaining the ability to handle different algorithm types through configurable hardware paths

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10891082B2Methods for accelerating compression and apparatuses using the same

Publication Date: 2021.01.12 VIA ALLIANCE SEMICON CO LTD

AI summary

The invention introduces a method for accelerating compression, performed by configuration logic of a compression accelerator, containing: obtaining an input parameter from a processor core; obtaining a configuration setting from a compression parameter table according to the input parameter; configuring hardware coupled between a first buffer and a second buffer to form a data transmission path according to the input parameter, wherein the first buffer stores raw data; and transmitting the configuration setting to devices on the data transmission path for processing the raw data to generate compressed data and storing the compressed data in the second buffer.