Configurable Computing Apparatus for Multi-Mode Cache Coherence

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Solution Overview

Problem

Servers of different architectures require different special-purpose apparatuses, leading to increased research and development expenses and limitations in switching between scale-up and scale-out server configurations.

Innovation Solution

A computing apparatus with a cache coherence engine circuit that can operate in multiple modes, enabling protocol conversion between system bus and network communication protocols, allowing for flexible configuration as either a node controller or network interface, thereby enabling the same apparatus to function in both multi-channel and cluster server setups.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If different special-purpose apparatuses are used for servers of different architectures, then the servers can function properly in their respective configurations, but the research and development expenses increase and switching between configurations becomes limited

Engineering Contradiction:
ImproveconfigurabilityVSAvoidapparatus variety
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing a single apparatus that can function as both a node controller in multi-channel servers and a network interface card in cluster servers. The apparatus includes a cache coherence engine that can operate in different modes and a protocol conversion circuit that enables it to handle both system bus protocols and network communication protocols, allowing one device to replace what previously required two different specialized devices

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent applies dynamics by making the apparatus configurable through mode selection. The cache coherence engine can be set to work in first mode (for multi-channel server operation) or second mode (for cluster server operation), and the protocol conversion circuit can be enabled or disabled based on the desired configuration, allowing the same hardware to adapt to different server architectures

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If additional peripheral devices are installed to switch between server configurations, then the server can adapt to different architectures, but the device complexity and cost increase

Engineering Contradiction:
ImproveconfigurabilityVSAvoidcost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent eliminates the need for additional peripheral devices by designing an apparatus that inherently supports both server configurations. The same apparatus with configurable modes replaces the need for adding node controllers to cluster servers or network adapters to multi-channel servers, reducing both hardware requirements and manufacturing costs

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If mode selection mechanism is added to the cache coherence engine, then the apparatus can function in both multi-channel and cluster server configurations, but the device complexity increases

Engineering Contradiction:
ImproveconfigurabilityVSAvoidcontrol mechanism
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent manages the complexity of mode selection by implementing a straightforward mechanism where the cache coherence engine can be configured to work in first mode or second mode. The protocol conversion circuit is either enabled or disabled based on the mode, providing a simple binary control mechanism rather than a complex multi-level configuration system

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10366006B2Computing apparatus, node device, and server
Publication Date: 2019.07.30 XFUSION DIGITAL TECH CO LTD
  • US10366006B2 patent drawing
  • US10366006B2 patent drawing
  • US10366006B2 patent drawing

AI summary

A computing apparatus, including at least one general computing core circuit, an internal interface circuit, an external interface circuit, a cache coherence engine circuit, and a protocol conversion circuit. The computing apparatus is coupled to an internal apparatus using the internal interface circuit, and is coupled to an external apparatus using the external interface circuit. When working in a first mode, the cache coherence engine circuit implements cache coherence between the computing apparatus, the internal apparatus, and the external apparatus, and in this case, the computing apparatus is used as a node controller. When working in a second mode, the cache coherence engine circuit processes only cache coherence between the computing apparatus and the internal apparatus, and the external interface circuit is used as a network interface circuit.