Configurable Data Converter for Multi-Format SoC Processing
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Solution Overview
Problem
Conventional SoCs require separate hardware for each type of data format conversion, leading to increased circuit size and inefficiency in processing multiple kinds of data format conversions, as software processing is time-consuming and dedicated hardware can only perform one intended conversion at a time.
Innovation Solution
A data processor with a register that allows multiple conversion patterns to be defined, enabling a single data converter to process various data format conversions by utilizing both current and previous input data, and managing data storage and transmission rates through buffers and multiplexers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If separate hardware is used for each type of data format conversion, then conversion speed is improved, but circuit size increases
Solution Approach 1:
The data converter is designed as a universal hardware unit that can perform multiple types of data format conversions (endian conversion, packing, unpacking, bit expansion, bit reduction) through a single configurable structure. The converter uses multiplexers and configurable logic to adapt its behavior based on control signals, allowing one hardware unit to replace multiple dedicated converters, thus reducing circuit size while maintaining fast conversion speed.
Solution Approach 2:
The data converter employs dynamic reconfiguration through control signals that change the operation mode of multiplexers and internal logic based on the required conversion type. This dynamic adaptability allows the same hardware circuit to be flexibly applied to different conversion tasks without requiring separate static hardware for each conversion type, resolving the contradiction between speed and circuit size.
2Device complexity
If software processing via CPU is used for data format conversion, then device complexity is reduced, but processing time increases
Solution Approach 1:
The patent replaces software-based CPU processing with dedicated hardware implementation. The data converter uses hardware circuits including multiplexers, buffers, and combinational logic to perform data format conversions directly in hardware, eliminating the need for software interpretation and CPU intervention. This substitution of hardware for software significantly reduces processing time while the modular hardware design keeps device complexity manageable.
3Area of stationary object
If a single data converter is used for multiple conversion types, then circuit size is reduced, but conversion capability decreases
Solution Approach 1:
The data converter is segmented into functional modules including multiple multiplexers (MUX0-MUX7), input buffers, and configurable logic units. Each module can be independently controlled to perform specific conversion operations. This segmentation allows the single converter to be flexibly configured for different conversion types by enabling/disabling specific modules through control signals, maintaining full conversion capability while using a unified circuit structure.
Solution Approach 2:
The converter's behavior is changed by modifying control parameters (control signals) rather than changing the physical circuit structure. By changing the control signals, the same hardware can switch between different conversion modes (endian, packing, unpacking, bit expansion, bit reduction), thereby maintaining adaptability and versatility without requiring multiple dedicated circuits.
Data Source
AI summary
A format converter includes a first input buffer for storing input data, an output buffer for storing output data, a converter connected between the first input buffer and the output buffer, and a register that the converter refers to. The register allows plural kinds of conversion patterns to be defined in conformity with a desired data format conversion. The converter generates the output data based on the input data, in accordance with the conversion pattern defined in the register.