Configurable Die Stacking for Thermal Management

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Solution Overview

Problem

As three-dimensional technology advances, stacked dies in multi-chip devices face challenges such as increased junction temperatures and power consumption due to accumulated power densities, which affect thermal energy dissipation and performance.

Innovation Solution

Dies are stacked and configured based on characteristics like leakage current, power density, and junction temperature, with interchangeable dies and redundant segments that can be activated or deactivated to optimize thermal management and performance, allowing for reduced junction temperatures and balanced performance across the device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If dies are stacked in three-dimensional configuration, then device footprint is decreased, but junction temperature increases

Engineering Contradiction:
Improvedevice footprintVSAvoidjunction temperature
Core Design Contradiction:
Area of stationary objectVSTemperature

Solution Approach 1:

The patent applies local quality by assigning different thermal management characteristics to different regions of the die stack. Specifically, it places dies with lower power density at positions closer to the heat sink and dies with higher power density at positions farther from the heat sink. This non-uniform arrangement optimizes heat dissipation at each location, addressing the temperature increase problem while maintaining the compact three-dimensional footprint.

Inventive Principle:
Principle #3Local quality

2Use of energy by moving object

If dies are stacked to increase device density, then power consumption decreases, but thermal energy dissipation becomes difficult

Engineering Contradiction:
Improvepower consumptionVSAvoidthermal energy dissipation
Core Design Contradiction:
Use of energy by moving objectVSLoss of energy

Solution Approach 1:

The patent implements preliminary action by pre-characterizing each die's power density and leakage current properties before stacking, and pre-planning the optimal stack configuration. This advance preparation allows the system to anticipate thermal management requirements and arrange dies in positions that facilitate efficient heat dissipation from the outset, rather than attempting to manage thermal issues after the stack is formed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system applies local quality by matching specific dies to specific positions in the stack based on their individual thermal characteristics. Dies with lower power consumption are placed in positions where heat dissipation is more challenging (closer to the heat sink), while dies with higher power consumption are placed in positions with better thermal pathways (farther from the heat sink). This localized optimization enables effective thermal management in the compact three-dimensional structure.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If interchangeable dies are used to reduce manufacturing cost, then device performance varies, but manufacturing precision decreases

Engineering Contradiction:
Improvemanufacturing costVSAvoiddevice performance consistency
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by systematically varying the arrangement of interchangeable dies based on their measured electrical characteristics (leakage current, power density). Rather than treating all interchangeable dies uniformly, the system changes the placement parameters according to each die's specific properties, thereby maintaining performance consistency despite using cost-effective interchangeable components.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system implements feedback by measuring the actual electrical characteristics of each die and using this information to determine its optimal position in the stack. This feedback loop ensures that variations in interchangeable dies are compensated for through intelligent placement, maintaining overall device performance consistency while benefiting from the cost advantages of interchangeability.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11043480B1Forming and/or configuring stacked dies
Publication Date: 2021.06.22 XILINX INC
  • US11043480B1 patent drawing
  • US11043480B1 patent drawing
  • US11043480B1 patent drawing

AI summary

Examples described herein generally relate to forming and/or configuring a die stack in a multi-chip device. An example is a method of forming a multi-chip device. Dies are formed. At least two or more of the dies are interchangeable. Characteristics of the at least two or more of the dies that are interchangeable are determined. A die stack comprising the at least two or more of the dies that are interchangeable is formed. Respective placements within the die stack of the at least two or more of the dies that are interchangeable are based on the characteristics.