Configurable Event Interfaces for Appliance Task Synchronization
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Solution Overview
Problem
Existing electronic systems with memory access controllers are limited by timing delays that slow down data processing, making them unsuitable for real-time applications like video streaming due to inefficient task sequencing and synchronization.
Innovation Solution
An electronic device with control circuits and configurable interfaces that synchronize tasks by prioritizing data access and using modes like filtering, emulation, and 'by-pass' to manage task activation signals, ensuring immediate data availability and reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a memory access controller with timing delay is used to sequence task execution, then task synchronization is achieved, but data processing speed is limited
Solution Approach 1:
The patent applies preliminary action by pre-configuring multiple event interfaces (external event interfaces and internal event interfaces) and their corresponding laws of correspondence before task execution. This allows the system to immediately route task activation signals through the appropriate interface without requiring timing delays for sequential configuration or arbitration, thereby achieving both synchronization and high-speed processing.
Solution Approach 2:
The patent segments the event routing function into multiple independent event interfaces (first external event interface, second external event interface, first internal event interface, second internal event interface), each with its own law of correspondence. This segmentation allows parallel processing of different task activation signals through different interfaces simultaneously, eliminating the need for sequential timing delays while maintaining proper task sequencing through the structured routing logic of each interface.
2Reliability
If timing delay is maximized to ensure data availability, then task execution reliability is improved, but system performance deteriorates
Solution Approach 1:
The patent implements dynamic event routing by configuring multiple event interfaces with different laws of correspondence that can be selectively applied based on the specific task and data availability conditions. Rather than using a fixed maximum timing delay, the system dynamically routes task activation signals through the most appropriate interface (external or internal, first or second) depending on the routing law configuration, achieving reliable task execution without unnecessary performance degradation.
Solution Approach 2:
The patent changes the parameter of event routing by providing multiple configurable event interfaces with different laws of correspondence. Each interface can be configured with specific routing parameters that determine how task activation signals are processed. This allows the system to optimize the routing parameters for each specific task scenario rather than applying a conservative maximum timing delay to all tasks, thereby maintaining reliability while improving overall system performance.
3Reliability
If sequential task sequencing is used, then task synchronization is maintained, but real-time data processing capability is lost
Solution Approach 1:
The patent introduces event interfaces as intermediary components between task activation signals and the memory access controller. These interfaces act as mediators that receive task activation signals and route them through configured laws of correspondence to the appropriate control circuits. This intermediary layer enables parallel signal routing while maintaining synchronization through the structured routing logic, eliminating the need for sequential processing and enabling real-time data processing capability.
4Reliability
If multiple control circuits are added for event routing, then task synchronization capability is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing event interfaces that can handle multiple types of task activation signals through a single unified structure. Each event interface is configured with a law of correspondence that can route different signals appropriately, making the interface multi-functional. This universal design allows the system to achieve sophisticated task synchronization capability while avoiding the need for separate dedicated control circuits for each function, thereby reducing overall device complexity.
Data Source
AI summary
An electronic device can be used for synchronizing tasks of an appliance that includes a memory access controller having inputs associated with priority levels. The device includes control circuits configured for receiving signals from events and delivering in response signals for activation of tasks. A configurable interface for external events designed to receive first event signals from at least one circuit of the appliance and to route some of them to the corresponding control circuits as a function of a first law of correspondence. A configurable interface for internal events designed to receive second event signals corresponding to the signals for activation of tasks and to route some of them to the control circuits as a function of a second law of correspondence.