Configurable FFT Circuit Multiplexer Reconfiguration
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Solution Overview
Problem
Existing FFT architectures are inefficient in terms of area consumption and latency when performing multiple sizes of FFTs, as they require multiple instances of FFT components, leading to increased complexity and resource utilization.
Innovation Solution
A configurable Fourier transform circuit is designed, which includes input and output Fourier transform components with multiplexers that allow for reconfiguration to perform FFTs of different sizes. This architecture shares data paths for different transform sizes, reducing area consumption and enabling efficient multi-mode and multi-channel FFT computation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple instances of FFT components are used to perform multiple sizes of FFTs, then the capability to perform different FFT sizes is improved, but the area consumption and device complexity increase
Solution Approach 1:
The patent implements a single FFT component that can perform multiple FFT sizes (e.g., 32-point, 64-point, 128-point, 256-point) by reconfiguring the connectivity of multiplexers and switches. This universal design eliminates the need for multiple separate FFT components, directly reducing area consumption while maintaining the capability to handle different transform sizes.
Solution Approach 2:
The patent employs dynamic reconfiguration of the FFT component through control signals that switch between different connectivity configurations. The multiplexers and switches can be dynamically reconfigured to change the data flow paths, allowing the same physical hardware to adapt to different FFT sizes without requiring multiple static instances.
2Adaptability or versatility
If multiple instances of FFT components are used to perform multiple sizes of FFTs, then the capability to perform different FFT sizes is improved, but the device complexity and resource utilization increase
Solution Approach 1:
The patent implements a single FFT component that can perform multiple FFT sizes (e.g., 32-point, 64-point, 128-point, 256-point) by reconfiguring the connectivity of multiplexers and switches. This universal design eliminates the need for multiple separate FFT components, directly reducing area consumption while maintaining the capability to handle different transform sizes.
Solution Approach 2:
The patent employs dynamic reconfiguration of the FFT component through control signals that switch between different connectivity configurations. The multiplexers and switches can be dynamically reconfigured to change the data flow paths, allowing the same physical hardware to adapt to different FFT sizes without requiring multiple static instances.
3Adaptability or versatility
If multiple instances of FFT components are used to perform multiple sizes of FFTs, then the capability to perform different FFT sizes is improved, but the latency increases
Solution Approach 1:
The patent employs dynamic reconfiguration of the FFT component through control signals that switch between different connectivity configurations. The multiplexers and switches can be dynamically reconfigured to change the data flow paths, allowing the same physical hardware to adapt to different FFT sizes without requiring multiple static instances.
Solution Approach 2:
The patent segments the FFT computation into stages using a pipelined architecture where different portions of the computation can be performed in parallel. This segmentation allows the system to maintain low latency by overlapping operations across different FFT sizes while using a single reconfigurable component.
Data Source
AI summary
Certain aspects of the present disclosure are directed towards a configurable Fourier transform circuit. The circuit includes a first input Fourier transform component having a first set of multiplexers, wherein the first input Fourier transform component is configurable to perform Fourier transforms of different sizes and different number of channels by controlling the first set of multiplexers; a first set of multiplier circuits having inputs coupled to outputs of the first input Fourier transform component; and a first output Fourier transform component having inputs coupled to outputs of the first set of multiplier circuits and having a second set of multiplexers, wherein the first output Fourier transform component is configurable to perform Fourier transforms of different sizes and different number of channels by controlling the second set of multiplexers.


