Configurable Interrupt Routing for Multi-Core Peripheral Access
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Solution Overview
Problem
In multi-core environments, existing technologies lack dynamic and flexible mapping of cores to peripherals, leading to inefficient interrupt routing and communication, as all cores often have access to all peripherals, which can result in resource mismanagement and security vulnerabilities.
Innovation Solution
Implementing a configurable interrupt routing system where cores are dynamically mapped to own specific peripherals, with configuration information stored securely, allowing for programmable core-to-peripheral mappings until a sticky lock bit is set, which then fixes these mappings until reboot, mimicking hard-wired connections through intermediate routing blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If all cores have access to all peripherals in multi-core environments, then peripheral accessibility is improved, but resource management efficiency deteriorates and security vulnerabilities increase
Solution Approach 1:
The patent segments peripheral access rights by creating distinct ownership assignments for each core. Instead of universal access, each core is assigned specific peripherals it can access, while maintaining the ability to access other peripherals through controlled mechanisms. This segmentation resolves the contradiction by providing targeted accessibility rather than blanket access.
Solution Approach 2:
The patent introduces an intermediary mechanism (the configurable access control system with ownership assignments) between cores and peripherals. This intermediary manages and controls access rights, allowing cores to access peripherals only when authorized, thereby improving resource management efficiency while maintaining necessary accessibility.
2Productivity
If configurable core-to-peripheral mappings are implemented, then resource management efficiency is improved, but device complexity increases
Solution Approach 1:
The patent implements dynamic configurability for core-to-peripheral mappings during device operation. The ownership assignments can be modified and reconfigured without requiring device reboot or complex external programming, thereby managing complexity internally while maintaining high resource management efficiency.
Solution Approach 2:
The system performs self-configuration through automated ownership assignment mechanisms. When a peripheral is reset or initialized, the system automatically assigns ownership to appropriate cores based on predefined criteria, reducing the need for manual configuration and lowering effective device complexity.
3Adaptability or versatility
If dynamic programmable core-to-peripheral mappings are used until lock bit is set, then adaptability is improved, but reliability deteriorates due to potential configuration errors
Solution Approach 1:
The patent implements preliminary validation and verification steps before finalizing configuration changes. The sticky lock bit mechanism ensures that configurations are properly validated and committed only when correct, preventing erroneous configurations from taking effect and maintaining system reliability.
Solution Approach 2:
The system provides a safety mechanism where configuration changes are buffered and validated before being applied. The lock bit acts as a protective barrier that prevents unauthorized or erroneous configurations from compromising system reliability, while still allowing legitimate adaptive reconfiguration when needed.
Data Source
AI summary
The disclosed technology is generally directed to peripheral access. In one example of the technology, stored configuration information is read. The stored configuration information is associated with mapping a plurality of independent execution environments to a plurality of peripherals such that the peripherals of the plurality of peripherals have corresponding independent execution environments of the plurality of independent execution environments. A configurable interrupt routing table is programmed based on the configuration information. An interrupt is received from a peripheral. The interrupt is routed to the corresponding independent execution environment based on the configurable interrupt routing table.