Configurable Logic Circuit Layout for Single-Layer Wiring Changes
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Solution Overview
Problem
Existing logic circuits in semiconductor devices, such as DRAM, require additional or different logic circuits during design and manufacturing, necessitating redesign of masks, which is time-consuming and costly.
Innovation Solution
Configurable logic circuits that can be configured as various types of logic circuits (e.g., NAND, NOR, multiplexer) by rearranging metal wiring patterns without multiple mask redesigns, allowing for adjustments during the design and manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If logic circuits are redesigned during manufacturing to accommodate additional or different logic functions, then the desired logic functions can be achieved, but the time and cost of manufacturing increase due to mask redesign
Solution Approach 1:
The patent applies preliminary action by pre-configuring transistors in a standardized layout pattern during the main fabrication process, before final wiring is established. This allows the basic logic circuit structure to be ready in advance, and only requires subsequent wiring adjustments to create different logic functions, avoiding the need to redesign masks at later stages
Solution Approach 2:
The patent segments the logic circuit design into two independent parts: the transistor array which follows a fixed standardized layout, and the wiring pattern which can be independently configured. This segmentation allows the transistor structure to be manufactured once using standard masks, while different logic functions are achieved by applying different wiring patterns without requiring mask redesign
2Adaptability or versatility
If logic circuits are redesigned during manufacturing to accommodate additional or different logic functions, then the desired logic functions can be achieved, but the manufacturing cost increases due to mask redesign
Solution Approach 1:
The patent applies preliminary action by pre-configuring transistors in a standardized layout pattern during the main fabrication process, before final wiring is established. This allows the basic logic circuit structure to be ready in advance, and only requires subsequent wiring adjustments to create different logic functions, avoiding the need to redesign masks at later stages
Solution Approach 2:
The patent segments the logic circuit design into two independent parts: the transistor array which follows a fixed standardized layout, and the wiring pattern which can be independently configured. This segmentation allows the transistor structure to be manufactured once using standard masks, while different logic functions are achieved by applying different wiring patterns without requiring mask redesign
3Adaptability or versatility
If multiple mask redesigns are performed to create different logic circuits, then various logic functions can be implemented, but the development efficiency decreases
Solution Approach 1:
The patent applies universality by creating a standardized transistor array layout that can serve multiple logic circuit functions. The same basic transistor structure and layout can be used to implement different logic functions (such as NAND, NOR, and other logic gates) by simply changing the wiring pattern, making the design universally applicable to various logic requirements without redesign
Solution Approach 2:
The patent applies preliminary action by pre-configuring transistors in a standardized layout pattern during the main fabrication process, before final wiring is established. This allows the basic logic circuit structure to be ready in advance, and only requires subsequent wiring adjustments to create different logic functions, avoiding the need to redesign masks at later stages
Data Source
AI summary
Embodiments of the disclosure are drawn to apparatuses and methods for arranging configurable logic circuits such that the configurable logic circuit may be configured to form one or more of several logic circuits by coupling a combination of nodes included in the logic circuit. Configuring the configurable logic circuit may include modification of a single wiring layer.