Configurable Memory I/O Interface for Substrate Adaptation

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Solution Overview

Problem

Current memory devices face challenges in achieving high reliability, low latency, and low power consumption while being scalable and cost-effective, especially as the demand for these features increases in various applications.

Innovation Solution

A memory device with a configurable input/output interface that can adapt to different substrate types, utilizing switching components and modulation schemes to optimize signal communication across various channel widths, allowing for efficient data transfer and reduced power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If memory devices use fixed I/O interface configurations, then manufacturing is simpler and cost-effective, but adaptability to different substrate types and applications is limited

Engineering Contradiction:
Improveadaptability to different substrate typesVSAvoidI/O interface complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The I/O interface is designed with reconfigurable components including switching elements and adjustable modulation schemes that allow the interface to dynamically change its configuration based on the substrate type detected. The system can switch between different I/O modes (e.g., first I/O mode for high-speed interfaces, second I/O mode for lower-speed interfaces) and adjust modulation parameters (e.g., PAM4 vs. binary modulation) to optimize performance for each substrate type while maintaining a unified physical interface structure.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

A single unified I/O interface structure is designed to support multiple substrate types (e.g., organic substrates, silicon interposers, glass substrates) through reconfigurable components. The interface can adapt its configuration to work with different channel widths (e.g., X4, X8, X16) and different modulation schemes, making one physical interface design serve multiple functions across different applications and substrate technologies without requiring separate dedicated interfaces for each substrate type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If memory devices optimize for high reliability and low latency, then performance improves, but manufacturing cost increases and scalability decreases

Engineering Contradiction:
Improvedata transfer reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The system optimizes reliability by dynamically adjusting operational parameters such as modulation scheme selection (PAM4 for high-speed, binary for robustness), voltage levels, and error correction codes based on the detected substrate type and channel conditions. This allows the same hardware to achieve high reliability across different substrate types without requiring expensive substrate-specific hardware optimizations, thereby maintaining cost-effectiveness and scalability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

A substrate type detection mechanism serves as an intermediary that identifies the connected substrate type and triggers appropriate I/O configuration adjustments. This mediator enables the system to automatically optimize for reliability by selecting appropriate modulation schemes and interface parameters based on substrate characteristics, without requiring manual configuration or expensive dedicated hardware for each substrate type, thus maintaining manufacturing simplicity and scalability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If memory devices use higher bandwidth I/O interfaces, then data transfer speed increases, but power consumption increases

Engineering Contradiction:
Improvedata transfer bandwidthVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The I/O interface dynamically adjusts its bandwidth and power consumption based on the substrate type detected. For example, when an organic substrate is detected with limited channel capacity, the system selects lower bandwidth modes (e.g., X4 channel width, binary modulation) to reduce power consumption. When silicon interposers or glass substrates with higher channel capacity are detected, the system can activate higher bandwidth modes (e.g., X16 channel width, PAM4 modulation) to maximize data transfer efficiency. This dynamic adaptation ensures optimal power-bandwidth efficiency for each substrate type.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters including channel width (X4, X8, X16), modulation scheme (binary, PAM4), and clock frequency based on substrate type detection. These parameter adjustments allow the interface to match the bandwidth capabilities of different substrates, avoiding unnecessary power consumption from operating at higher bandwidths than the substrate can support, while still achieving high bandwidth when the substrate capability allows it.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11087804B2Memory device with configurable input/output interface
Publication Date: 2021.08.10 MICRON TECHNOLOGY INC
  • US11087804B2 patent drawing
  • US11087804B2 patent drawing
  • US11087804B2 patent drawing

AI summary

Methods, systems, and apparatuses for a memory device that is configurable based on the type of substrate used to couple the memory device with a host device are described. The reconfigurable memory device may include a plurality of components for different configurations. Various components of the reconfigurable memory die may be activated/deactivated based on a type of substrate used in the memory device. The memory device may include an input/output (I/O) interface that is variously configurable. A first configuration may cause the memory device to communicate signals modulated using a first modulation scheme across a channel of a first width. A second configuration may cause the memory device to communicate signals modulated using a second modulation scheme across a channel of a second width. The I/O interface may include one or more switching components to selectively couple pins of a channel together and/or selectively couple components to various pins.