Configurable Memory Management Protocol for Dynamic Performance Adaptation

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Solution Overview

Problem

Current memory devices face challenges in meeting the diverse and competing requirements of different electronic systems, such as endurance, performance, power consumption, and defectivity protection, as they are typically customized for specific applications, leading to complex architectures and inventory management issues.

Innovation Solution

The development of managed memory devices with self-adjusting memory management protocols that can change operating conditions based on monitored operating conditions, such as program/erase cycles, error management, and power consumption, to optimize performance and endurance while balancing competing requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory devices are customized for specific applications with dedicated protocols, then performance and reliability for that specific application are improved, but device complexity and inventory management complexity increase

Engineering Contradiction:
Improveapplication-specific reliabilityVSAvoidarchitecture complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory device incorporates a unified memory management protocol that can dynamically adapt to serve multiple applications and usage patterns. The protocol includes configurable parameters and selectable modes that allow the same hardware architecture to optimize for different requirements (performance, endurance, power) without requiring application-specific customizations, thereby reducing device complexity while maintaining reliability across diverse use cases.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory management protocol is designed to be dynamic rather than static, allowing it to adjust its behavior based on real-time monitoring of operating conditions. The protocol can switch between different operational modes and adjust parameters such as wear-leveling aggressiveness, error correction intensity, and power management strategies, enabling a single device to adapt to varying application requirements without increasing architectural complexity.

Inventive Principle:
Principle #15Dynamics

2Reliability

If memory devices are customized for specific applications, then meeting specific system requirements is improved, but inventory management and interoperability worsen

Engineering Contradiction:
Improvesystem requirement complianceVSAvoidinteroperability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The memory device implements a universal memory management protocol that can serve multiple applications and system requirements through configurable parameters and selectable operational modes. This allows a single device design to interoperable with various electronic systems while meeting their specific requirements for performance, endurance, or power efficiency, thereby improving both reliability and adaptability simultaneously.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory management protocol includes adjustable parameters that can be configured at initialization or runtime to match different system requirements. These parameters control aspects such as wear-leveling strategies, error correction codes, power management thresholds, and performance optimization settings, allowing the same device to adapt to diverse applications without requiring custom hardware designs.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If memory management protocols are fixed and static, then device complexity is reduced, but ability to meet varying system requirements worsens

Engineering Contradiction:
Improveprotocol complexityVSAvoidconfiguration flexibility
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The memory management protocol is designed as a dynamic system that can adjust its behavior based on monitored operating conditions and configured parameters. It includes multiple operational modes that can be selected or automatically switched between, allowing the protocol to adapt to different system requirements for performance, endurance, and power consumption without requiring complex customizations for each application.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The protocol incorporates configurable parameters that control its operational characteristics, such as wear-leveling aggressiveness, error correction intensity, power management thresholds, and performance optimization settings. These parameters can be adjusted through software or configuration registers, allowing the same protocol implementation to meet diverse system requirements while maintaining a unified architectural design.

Inventive Principle:
Principle #35Parameter changes

4Ease of manufacture

If single memory device design is used for all systems, then manufacturing and inventory are simplified, but meeting diverse system requirements becomes difficult

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidsystem requirement compliance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The memory device employs a universal memory management protocol with configurable parameters and selectable operational modes that enable a single device design to meet diverse system requirements. The protocol can be configured at initialization or runtime to optimize for performance, endurance, or power efficiency, allowing manufacturers to produce a unified device that reliably serves multiple applications without requiring application-specific customizations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory management protocol includes adjustable parameters that control its behavior to match different system requirements. These parameters can be configured through software or hardware registers, allowing a single device design to adapt to various applications' needs for performance, endurance, or power consumption, thereby maintaining manufacturing simplicity while ensuring requirement compliance.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11579996B2Memory device with configurable performance and defectivity management
Publication Date: 2023.02.14 MICRON TECHNOLOGY INC
  • US11579996B2 patent drawing
  • US11579996B2 patent drawing
  • US11579996B2 patent drawing

AI summary

A memory device comprises a memory control unit including a processor configured to control operation of the memory array according to a first memory management protocol for memory access operations, the first memory management protocol including boundary conditions for multiple operating conditions comprising program/erase (P/E) cycles, error management operations, drive writes per day (DWPD), and power consumption; monitor operating conditions of the memory array for the P/E cycles, error management operations, DWPD, and power consumption; determine when a boundary condition for one of the multiple operating conditions is met; and in response to determining that a first boundary condition for a first monitored operating condition is met, change one or more operating conditions of the first memory management protocol to establish a second memory management protocol for the memory access operations, the second memory management protocol including a change boundary condition of a second monitored operating condition.