Configurable Overlap Power Switch Multiplexer

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Solution Overview

Problem

Existing power switch multiplexers in integrated circuits lack flexibility in managing power distribution between multiple external supply voltage nodes, leading to inefficiencies in switching and potential noise or inrush current issues during voltage changes.

Innovation Solution

A power switch multiplexer with configurable overlap modes, allowing for serial activation and deactivation of power switches between internal and external nodes, and enabling daisy-chaining configurations to manage power distribution efficiently, with modes like full overlap, half overlap, bypass, and sleep modes to optimize switching operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If power switches are activated and deactivated simultaneously during voltage switching, then switching speed is improved, but noise and inrush current increase

Engineering Contradiction:
Improveswitching speedVSAvoidnoise and inrush current
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by asserting the activation signal to couple the first external supply voltage node to the internal power node before asserting the deactivation signal to decouple the second external supply voltage node. This sequencing ensures that a valid power source is established before the previous source is disconnected, preventing inrush current and noise while maintaining efficient switching operation.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If multiple power switch multiplexers are chained together for complex power distribution, then power management flexibility is improved, but system complexity increases

Engineering Contradiction:
Improvepower management flexibilityVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the power distribution system into multiple independent power switch multiplexer instances, each managing a specific power domain. Each instance can be configured independently with its own overlap setting, allowing complex power management requirements to be broken down into manageable segments while maintaining overall system flexibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies dynamics by providing configurable overlap settings that allow the system to adapt its switching behavior based on requirements. The overlap parameter can be adjusted to create different switching profiles (non-overlapping, partial overlap, full overlap), enabling the system to dynamically adapt to different operational conditions and power management scenarios.

Inventive Principle:
Principle #15Dynamics

3Object-generated harmful factors

If overlap timing is increased to reduce inrush current, then noise reduction is improved, but switching response time increases

Engineering Contradiction:
Improvenoise reductionVSAvoidswitching response time
Core Design Contradiction:
Object-generated harmful factorsVSLoss of time

Solution Approach 1:

The patent applies parameter changes by providing a configurable overlap parameter that controls the timing relationship between activation and deactivation signals. This parameter can be adjusted to optimize the balance between noise reduction and switching response time, allowing the system to adapt to different noise sensitivity and speed requirements without fixed constraints.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10908663B2Power switch multiplexer with configurable overlap
Publication Date: 2021.02.02 APPLE INC
  • US10908663B2 patent drawing
  • US10908663B2 patent drawing
  • US10908663B2 patent drawing

AI summary

A power switch multiplexer with configurable overlap is disclosed. An integrated circuit (IC) includes a first functional circuit block coupled to receive a supply voltage from a first supply voltage node. The IC further includes an input circuit and an output circuit. Responsive to receiving an input signal, the input circuit asserts an activation signal to cause one of a second supply voltage node and a third supply voltage node to be electrically coupled to the first supply voltage node. Subsequently the input circuit asserts a deactivation signal to cause the other one of the second and third supply voltage nodes to be electrically decoupled from the first supply voltage node. The output circuit is coupled to receive the activation signal and the deactivation signal, and configured to assert a first output signal subsequent to receiving the activation signal.