Configurable PCB Layout for Storage Capacity and Signal Integrity

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Solution Overview

Problem

The challenge of manufacturing storage devices with varying capacities on a single printed circuit board leads to unused conductive lines, which hinder signal integrity (SI).

Innovation Solution

A storage device design with a printed circuit board featuring conductive lines connected by resistive elements, allowing for flexible configuration and separation of unused lines to prevent signal interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conductive lines are manufactured based on the topology requiring the greatest number of conductive lines to support various storage device capacities, then the storage device can support various capacities, but some conductive lines remain unused and hinder signal integrity

Engineering Contradiction:
Improvesupport for various storage device capacitiesVSAvoidsignal integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent extracts and removes unused conductive lines from the circuit board topology. By designing the circuit board with selective conductive line configurations that can be manufactured in different variants, unused lines are completely removed rather than left dangling, thereby eliminating their harmful effect on signal integrity while maintaining support for various storage capacities.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies local quality by creating different conductive line topology configurations tailored to specific storage capacity requirements. Instead of using a uniform topology for all capacities, the circuit board is manufactured with conductive lines arranged according to the specific needs of each capacity variant, ensuring that only necessary lines are present and no unused lines interfere with signal integrity.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If unused conductive lines are left on the printed circuit board to maintain the same manufacturing process, then manufacturing costs are reduced, but signal integrity is hindered

Engineering Contradiction:
Improvemanufacturing cost reductionVSAvoidsignal integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts unused conductive lines from the circuit board design and removes them completely. This is achieved by manufacturing different variants of circuit boards with selectively included or excluded conductive lines based on the specific storage capacity required, thereby eliminating the harmful presence of unused lines while maintaining manufacturing efficiency.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the physical configuration parameter of the conductive lines by creating multiple topology variants. Each variant has conductive lines configured according to specific capacity requirements, transforming the circuit board from a fixed topology to a family of variable topologies that optimize both manufacturing and signal integrity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12550253B2Storage device including configurable printed circuit board
Publication Date: 2026.02.10 SAMSUNG ELECTRONICS CO LTD
  • US12550253B2 patent drawing
  • US12550253B2 patent drawing
  • US12550253B2 patent drawing

AI summary

A storage device includes a printed circuit board including a controller site, a first memory site, a second memory site, first conductive lines connected with the controller site, second conductive lines connected with the first memory site, and third conductive lines connected with the second memory site, a controller package provided on the controller site, a first nonvolatile memory package provided on the first memory site, a second nonvolatile memory package provided on the second memory site, and at least one resistor connecting at least one conductive line of the first conductive lines with at least one conductive line of the second conductive lines.