Configurable Pin Driver Circuit for Stable DUT Impedance
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Solution Overview
Problem
Existing test systems for electronic devices face challenges in maintaining a stable and known impedance characteristic at the device under test (DUT) interface, leading to signal degradation and erroneous test results due to factors like skin effect losses and waveform reflections.
Innovation Solution
A test system with a comparator circuit, active load, and output stage circuit that includes a class AB driver with push-pull transistors, a bias current controller, and feedback controller to adjust impedance characteristics based on DUT current, ensuring a stable impedance at the DUT interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a physical 50 ohm output resistor is provided at the DUT interface, then impedance matching is improved, but device complexity and cost increase
Solution Approach 1:
The patent replaces the physical mechanical resistor with an electronic equivalent impedance created by transistors operating in their linear region. The transistor's dynamic impedance (rd || ro) electronically simulates the 50 ohm resistance without requiring a physical resistive element, thereby reducing component count and circuit complexity while maintaining impedance matching reliability
Solution Approach 2:
The patent dynamically adjusts transistor biasing parameters (Vgs, Id) to control the transistor's output impedance characteristics. By changing the operating point and bias conditions, the transistor's incremental impedance can be tuned to match the desired 50 ohm characteristic impedance across varying signal conditions, replacing fixed physical resistors with dynamically controllable electronic impedance
2Reliability
If output impedance is made stable and known, then signal integrity is improved, but device complexity increases due to additional control circuits
Solution Approach 1:
The patent employs feedback mechanisms where the transistor's operating point is continuously adjusted based on the signal conditions to maintain stable output impedance. The biasing circuitry uses feedback from the output stage to regulate the transistor's incremental impedance, ensuring it remains at the target 50 ohms despite variations in signal amplitude and frequency, thereby maintaining signal integrity through adaptive control
Solution Approach 2:
The transistor output stage inherently provides impedance stabilization through its own characteristics when properly biased. The circuit uses the transistor's natural output impedance properties (rd || ro) combined with its biasing network to self-regulate the impedance presentation to the DUT, reducing the need for external complex control circuits while maintaining stable known impedance
3Use of energy by moving object
If class AB driver circuit with push-pull transistors is used, then power efficiency is improved, but impedance stability deteriorates due to incremental impedance variations
Solution Approach 1:
The patent addresses impedance stability in class AB push-pull circuits by dynamically adjusting the biasing parameters of the transistors. By changing the Q-point and bias current levels, the incremental impedance of each transistor can be controlled to maintain a stable combined output impedance of 50 ohms, compensating for the inherent impedance variations that occur during the push-pull switching operation and signal transitions
Data Source
AI summary
A test system can provide a test signal to, or receive a test signal from, a device under test (DUT) via a first signal path. The test system can be configured to present a stable (e.g., 50 ohm) impedance at the DUT interface. In an example, the stable impedance comprises a physical polysilicon resistor in series with an output stage of a driver circuit of the test system. The impedance of the output stage can be a function of an incremental impedance of transistors in a push-pull output circuit. In an example, a control loop is provided to change a bias condition for the transistors to adjust the impedance of the output stage.


