Configurable PLL Circuit for Analog-Digital Mode Switching

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Solution Overview

Problem

Conventional phase-locked loops (PLLs) face limitations in combining the advantages of both analog and digital loops, as they often require switching between modes, which can lead to inefficiencies and increased complexity.

Innovation Solution

A configurable PLL device that can switch between analog and hybrid digital-analog modes by using a switching mechanism to connect or disconnect components such as phase detectors, loop filters, and voltage-controlled oscillators, allowing for efficient operation in either mode based on control signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a PLL uses only analog components, then the circuit is simple and power consumption is low, but the adaptability and precision are limited

Engineering Contradiction:
Improveconfigurability between analog and digital modesVSAvoidcircuit structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The PLL circuit is designed to perform multiple functions by switching between analog and digital modes. The same physical circuit can operate as an analog PLL or a digital PLL based on the configuration of switching elements, allowing one circuit to serve multiple purposes and achieve adaptability without requiring separate dedicated circuits for each mode.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The circuit incorporates dynamic reconfigurability through switching elements that can change the circuit topology in real-time. The switching elements enable the circuit to transition between different operational states (analog mode and digital mode), making the system adaptable to different requirements without being fixed in a single configuration.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If a PLL uses digital components, then precision and adaptability improve, but power consumption increases and circuit complexity increases

Engineering Contradiction:
Improvephase detection precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The circuit dynamically switches between analog and digital operational modes based on requirements. When high precision is needed, the digital mode with TDC and digital loop filter is activated; when power consumption is more critical, the analog mode is used. This dynamic switching allows the system to optimize the trade-off between precision and power consumption rather than being locked into one mode.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The circuit changes its operational parameters by switching between analog and digital configurations. The switching elements modify the circuit's electrical characteristics and operational parameters, enabling transitions between different precision and power consumption states. This parameter change capability allows the system to adapt to different performance requirements.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If switching between analog and digital modes is implemented, then adaptability improves, but the switching mechanism adds complexity

Engineering Contradiction:
Improvemode configurabilityVSAvoidswitching mechanism complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The PLL circuit is segmented into distinct functional blocks (phase detector, loop filter, VCO, etc.) that can be independently configured. The switching elements are placed at strategic points to control signal paths between these segments, allowing mode switching without requiring complete redesign of the entire circuit. This segmentation makes the switching mechanism more manageable and less complex.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8339165B2Configurable digital-analog phase locked loop
Publication Date: 2012.12.25 QUALCOMM INC
  • US8339165B2 patent drawing
  • US8339165B2 patent drawing
  • US8339165B2 patent drawing

AI summary

A phase locked loop (PLL) device is configurable in an analog phase locked loop and a hybrid analog-digital phase locked loop. In an analog mode, at least a phase detector, an analog loop filter, and a voltage controlled oscillator (VCO), are connected to form an analog loop. In a digital mode, at least the phase detector, the voltage controlled oscillator (VCO), a time to digital converter (TDC), a digital loop filter and a digital to analog converter (DAC) are connected to form the hybrid digital-analog loop.