Configurable Power Combiner and Splitter for 5G Front-Ends
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Solution Overview
Problem
Current phased-array transceivers for 5G millimeter wave front-ends face challenges in reducing die size and power consumption while maintaining transmit power output and noise figure, especially due to the use of non-configurable passive elements like Wilkinson power combiners, which result in increased insertion loss and power consumption.
Innovation Solution
A configurable power combiner and splitter (CPCS) is introduced, featuring a transistor coupled between two paths to adjust impedance based on control signals, allowing it to operate as either a combiner or a switch, thereby reducing path loss and power consumption by selectively enabling or disabling paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a non-configurable passive element like Wilkinson power combiner is used, then the power combining function is achieved, but insertion loss increases and power consumption increases
Solution Approach 1:
The patent applies dynamics by replacing static passive elements with dynamic active components (transistors) that can change their state based on control signals. The transistor coupled between the first and second paths can adjust the impedance dynamically, allowing the circuit to switch between combiner mode (low impedance connecting both paths) and switch mode (high impedance isolating paths), thereby reducing insertion loss while maintaining adaptability.
Solution Approach 2:
The patent changes the impedance parameter of the coupling element between paths from a fixed value to a variable value controlled by control signals. By adjusting the transistor's impedance state (on/off or resistance value), the circuit optimizes signal transmission in different operating modes, reducing insertion loss in combiner mode while enabling selective path activation in switch mode.
2Use of energy by stationary object
If a non-configurable passive element like Wilkinson power combiner is used, then the power combining function is achieved, but power consumption increases
Solution Approach 1:
The patent uses dynamic transistor switching to enable configurability while reducing power consumption. In switch mode, the transistor isolates inactive paths, preventing power dissipation in unused signal paths. The ability to dynamically reconfigure the circuit allows the system to adapt to different operational requirements, maintaining low power consumption by activating only necessary signal paths.
Solution Approach 2:
The patent changes the impedance parameter of the coupling element to optimize power consumption. By adjusting the transistor's impedance state based on control signals, the circuit minimizes power dissipation in inactive paths while maintaining proper signal combining or switching functionality, thereby reducing overall power consumption compared to fixed passive combiners.
3Reliability
If the number of antenna elements is increased to improve performance, then communication performance improves, but die size increases and power consumption increases
Solution Approach 1:
The patent applies universality by designing a configurable power combiner and splitter that can serve multiple functions: power combining mode for multiple active antenna elements, and switch mode for selective single-path transmission. This multi-functional design allows the same circuit architecture to support different numbers of active antenna elements, optimizing communication performance while minimizing die size by avoiding dedicated combiner circuits for each possible configuration.
Solution Approach 2:
The patent uses dynamic reconfiguration capability to allow a fixed-size circuit to adapt to different antenna element configurations. The transistor-controlled impedance adjustment enables the same physical circuit to support varying numbers of active antenna elements dynamically, eliminating the need for multiple fixed combiner circuits and thereby reducing overall die size while maintaining communication performance.
4Reliability
If the number of antenna elements is increased to improve performance, then communication performance improves, but power consumption increases
Solution Approach 1:
The patent applies universality by creating a multi-functional circuit that can operate as a power combiner when multiple antenna elements are active, and as a switch when fewer elements are active. This allows the system to optimize power consumption by selecting the appropriate operational mode based on the number of active antenna elements, maintaining communication performance while reducing unnecessary power dissipation in inactive paths.
Solution Approach 2:
The patent changes the impedance parameter of the coupling element dynamically to optimize power consumption for different antenna configurations. By adjusting the transistor's impedance state based on control signals corresponding to the desired number of active antenna elements, the circuit minimizes power dissipation while maintaining proper signal combining or switching functionality, thereby reducing overall power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The CPCS significantly reduces path loss and power consumption, achieving comparable or better performance than classical Wilkinson combiners, with insertion losses as low as 0.8 dB in combiner mode and 1.5 dB in switch mode, while enabling configuration as either a combiner or a switch.
Implementation Method 1
The first transistor is configured to receive a control signal to control the first transistor to adjust an impedance between the first path and the second path
Data Source
AI summary
A signal processing circuit reduces die size and power consumption for each antenna element. The signal processing circuit includes a first set of ports, a third port, a first path, a second path and a first transistor. The first path is between a first port of the first set of ports and the third port. The second path is between a second port of the first set of ports and the third port. The first transistor is coupled between the first path and the second path. The first transistor is configured to receive a control signal to control the first transistor to adjust an impedance between the first path and the second path.