Configurable Power Module Topology With Chip-Level Diagnostics

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Solution Overview

Problem

Multichip power semiconductor modules are typically designed for a fixed topology, limiting the extraction of chip-level diagnostics signals and flexibility in configuration, and often require multiple modules for complex topologies.

Innovation Solution

A configurable power semiconductor module design featuring an adapter board with vertical posts connecting semiconductor chips to terminals, allowing for flexible topology configuration and diagnostics signal extraction, while maintaining a compact footprint and low stray inductance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If power semiconductor chips are connected and controlled in parallel for a defined topology, then the module structure is simplified, but chip individual information and diagnostics signals cannot be extracted

Engineering Contradiction:
Improvemodule structureVSAvoidchip individual information
Core Design Contradiction:
Device complexityVSLoss of information

Solution Approach 1:

The patent divides the module into sub-modules, each containing individual power semiconductor chips with separate terminals. This segmentation allows each chip to be individually addressed and monitored while maintaining an organized overall structure, resolving the contradiction between structural simplicity and information accessibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediate connection layer with vertical posts and circuit board traces that mediate between the chips and external terminals. This intermediary structure enables individual chip signal extraction without requiring complex external wiring, maintaining structural simplicity while providing access to chip-level diagnostics.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If complex topologies are realized by using various individual modules, then topology flexibility is achieved, but the system requires multiple modules increasing complexity

Engineering Contradiction:
Improvetopology configurationVSAvoidnumber of modules
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent designs a universal module architecture with standardized terminals and configurable internal connections that can accommodate multiple topologies (half-bridge, full-bridge, three-phase, etc.) within a single module type. This multi-functionality eliminates the need for multiple specialized modules while maintaining topology flexibility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements dynamically reconfigurable connections within the module using switchable elements and programmable routing that allow the topology to be changed during operation or reconfiguration, enabling a single module to adapt to different topology requirements without physical reassembly.

Inventive Principle:
Principle #15Dynamics

3Ease of manufacture

If power semiconductor modules are designed with basic terminal connections, then manufacturing is simplified, but chip-individual diagnostics signals cannot be extracted

Engineering Contradiction:
Improveterminal connection structureVSAvoiddiagnostics signal extraction
Core Design Contradiction:
Ease of manufactureVSDifficulty of detecting and measuring

Solution Approach 1:

The patent merges power signal paths and diagnostics signal paths into a unified terminal structure where both types of signals can be accessed through the same physical terminals. This combination maintains manufacturing simplicity while enabling diagnostics, as the same connection infrastructure serves dual purposes.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements local quality differentiation in the terminal design, where specific terminal regions are optimized for power connections while adjacent regions provide optimized access for diagnostics signals. This local specialization allows both power transmission and signal extraction through the same terminal structure without compromising either function.

Inventive Principle:
Principle #3Local quality

4Adaptability or versatility

If multiple individual modules are used to achieve flexible topology, then topology adaptability is improved, but the footprint and stray inductance increase

Engineering Contradiction:
Improvetopology configurationVSAvoidmodule footprint
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent nests multiple functional elements (chips, terminals, connection paths) within a compact hierarchical structure where sub-modules are integrated into a larger module framework. This nesting approach allows complex multi-topology functionality to be achieved within a single compact footprint, eliminating the space required for multiple separate modules.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent transitions from a planar two-dimensional layout to a three-dimensional integrated structure with vertical stacking and multi-layer circuit boards. This dimensional change allows multiple functional elements to be arranged in space rather than only on a plane, significantly reducing the footprint while maintaining all necessary connection paths for flexible topology configuration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12599012B2Free configurable power semiconductor module
Publication Date: 2026.04.07 HITACHI ENERGY LTD
  • US12599012B2 patent drawing
  • US12599012B2 patent drawing
  • US12599012B2 patent drawing

AI summary

A power semiconductor module includes a semiconductor board and a number of semiconductor chips attached to the semiconductor board. Each semiconductor chip has two power electrodes. An adapter board is attached to the semiconductor board above the semiconductor chips. The adapter board includes a terminal area for each semiconductor chip on a side facing away from the semiconductor board. The adapter board, in each terminal area, provides a power terminal for each power electrode of the semiconductor chip associated with the terminal area. Each power terminal is electrically connected via a respective vertical post below the terminal area with a respective semiconductor chip and each of the power terminals has at least two plug connectors. Jumper connectors interconnect the plug connectors for electrically connecting power electrodes of different semiconductor chips.