Configurable Processor Pipeline for Multi-Thread Clock Speed
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Solution Overview
Problem
Configurable integrated circuits face a trade-off between speed and flexibility, with long interconnect paths limiting clock speed due to data transfer delays, and existing solutions require modifications to user designs or incorporate additional components like latches.
Innovation Solution
A configurable processing circuit with a thread data store, multiple execution units, a configurable routing network, and a pipeline that associates each thread with a configuration instance, allowing dynamic reconfiguration of pipeline sections and routing networks to optimize data flow and clock speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If function units are spaced across the chip to provide flexibility, then adaptability is improved, but interconnect path length increases causing clock speed to decrease
Solution Approach 1:
The circuit is divided into multiple pipeline sections, each with its own configuration instance. This segmentation allows the interconnect path to be broken into manageable segments that can be configured independently, reducing the impact of long interconnect paths on clock speed while maintaining flexibility through per-section configuration.
Solution Approach 2:
The pipeline sections are dynamically configurable through configuration instances stored in a configuration data store. Each pipeline section can be reconfigured for different clock cycles to accommodate different thread requirements, allowing the system to adapt to varying computational needs while maintaining optimal performance for each configuration.
2Speed
If latches are added to pipeline sections to limit time delays, then clock speed is improved, but device complexity increases due to required user modifications
Solution Approach 1:
The pipeline sections automatically acquire their configuration from the configuration data store using configuration identifiers propagated with each thread. This self-service mechanism eliminates the need for users to manually incorporate latches or modify their designs, as the configuration is automatically retrieved and applied based on thread context.
Solution Approach 2:
Configuration instances act as intermediaries between the thread data and the pipeline section configuration. The configuration identifier serves as a key that retrieves the appropriate configuration from the configuration data store, automatically configuring the pipeline section without requiring user intervention or additional circuitry.
3Productivity
If multiple threads are handled simultaneously, then productivity is improved, but configuration management complexity increases
Solution Approach 1:
Configuration instances are stored in a configuration data store and copied to pipeline sections as needed based on thread configuration identifiers. This copying mechanism allows multiple threads to share the same configuration or use different configurations without requiring separate physical configuration circuits for each thread, simplifying the management of multiple thread configurations.
Data Source
AI summary
A configurable processing circuit capable of handling multiple threads simultaneously, the circuit comprising a thread data store, a plurality of configurable execution units, a configurable routing network for connecting locations in the thread data store to the execution units, a configuration data store for storing configuration instances that each define a configuration of the routing network and a configuration of one or more of the plurality of execution units, and a pipeline formed from the execution units, the routing network and the thread data store that comprises a plurality of pipeline sections configured such that each thread propagates from one pipeline section to the next at each clock cycle, the circuit being configured to: (i) associate each thread with a configuration instance; and (ii) configure each of the plurality of pipeline sections for each clock cycle to be in accordance with the configuration instance associated with the respective thread that will propagate through that pipeline section during the clock cycle.


