Configurable Solar Cells With Partitioned Junctions
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Solution Overview
Problem
Existing photovoltaic cell technologies face limitations in configuring output current characteristics on a single semiconductor wafer and efficiently interconnecting multiple wafers in photovoltaic panels, leading to suboptimal performance and power loss.
Innovation Solution
The creation of multiple semi-electrically isolated collecting junctions on a single light-absorbing wafer, electrically interconnected in parallel circuits, allows for configurable power characteristics and flexible interconnection of wafers in panels, using techniques like laser scribing and doping to achieve semi-electrical isolation and adjustable partition resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If multiple collecting junctions are created on a single wafer, then power characteristics become configurable and power loss is reduced, but device complexity increases
Solution Approach 1:
The patent divides a single light-absorbing wafer into multiple semi-electrically isolated collecting junctions by creating partition regions through laser scribing and doping. These partitions segment the wafer into distinct electrical zones that can be independently connected in parallel circuits, enabling configurable power output characteristics while reducing power loss through optimized current collection paths.
Solution Approach 2:
The patent applies localized doping regions and partition structures at specific locations on the wafer to create semi-electrically isolated collecting junctions. Each junction has tailored electrical properties through localized material modification, allowing different regions to optimize current collection while maintaining overall system performance and reducing power loss.
2Adaptability or versatility
If laser scribing and doping are used to create partitions, then semi-electrical isolation is achieved and power characteristics are configurable, but manufacturing complexity increases
Solution Approach 1:
The patent performs laser scribing and doping processes during the wafer fabrication stage to pre-create the partition regions and semi-electrically isolated collecting junctions. This preliminary action integrates the partitioning structure into the manufacturing process itself, enabling configurable power characteristics without requiring complex post-processing or assembly steps.
3Adaptability or versatility
If wafers are interconnected in parallel circuits, then flexibility in panel design is enhanced and power loss is reduced, but interconnection complexity increases
Solution Approach 1:
The patent combines multiple semi-electrically isolated collecting junctions on a single wafer into parallel circuit configurations, merging their electrical outputs to create a unified power source with enhanced flexibility. This merging approach allows the wafer to function as multiple interconnected cells simultaneously, reducing power loss while maintaining design adaptability for various panel configurations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the flexibility in designing photovoltaic devices, reduces power loss, and enables efficient interconnection of wafers, allowing for irregular shapes and sizes, matching standard power characteristics, and optimizing panel performance.
Implementation Method 1
a base region configured to absorb incident light and produce a photovoltaic current
Implementation Method 2
laser scribing
Data Source
AI summary
A photovoltaic cell may include a substrate configured as a single light absorption region. The cell may include at least one first semiconductor region and at least one second semiconductor region arranged on or in the substrate. The cell may include a plurality of first conductive contacts arranged on the substrate and physically separated from one another and a plurality of second conductive contacts arranged on the substrate and physically separated from one another. Each first conductive contact may be configured to facilitate electrical connection with the at least one first semiconductor region. Each second semiconductor conductive contact may be configured to facilitate electrical connection with the at least one second semiconductor region. Each of the first conductive contacts may form at least one separate cell partition with at least one of the second conductive contacts, thereby forming a plurality of cell partitions on or in the substrate.