Configurable TLB Subsystem for Dynamic Page Size Adaptation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current translation lookaside buffers (TLBs) face challenges in reducing miss rates due to fixed page size configurations, which lead to inefficiencies in memory access and increased latency, as they struggle to adapt to varying memory usage patterns.

Innovation Solution

A TLB architecture that combines a fixed sub-TLB with a configurable sub-TLB, allowing dynamic reconfiguration of page sizes after boot to accommodate changing memory usage, with the configurable sub-TLB supporting multiple page sizes and the fixed sub-TLB maintaining a fixed page size set, optimizing resource allocation based on miss rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a fixed sub-TLB architecture is used, then hardware simplicity is maintained, but adaptability to varying memory usage patterns deteriorates

Engineering Contradiction:
ImproveTLB architecture simplicityVSAvoidadaptability to memory usage patterns
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The TLB is divided into two distinct sub-TLBs: a fixed sub-TLB that maintains simple, predictable behavior and a configurable sub-TLB that can adapt to varying memory usage patterns. This segmentation allows each component to fulfill its specific function without compromising the other, resolving the contradiction between simplicity and adaptability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The configurable sub-TLB introduces dynamic reconfiguration capability after boot time, allowing the TLB to adjust its page size sets based on actual memory usage patterns. This dynamic aspect addresses the adaptability requirement while the fixed sub-TLB provides a stable baseline.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If a single configurable sub-TLB is used, then adaptability to different page sizes is improved, but device complexity increases

Engineering Contradiction:
Improvesupport for multiple page sizesVSAvoidTLB structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Instead of using a single configurable sub-TLB, the system segments the TLB into a fixed sub-TLB and a configurable sub-TLB. This segmentation reduces the complexity burden on any single component while collectively providing support for multiple page sizes through the coordinated operation of both sub-TLBs.

Inventive Principle:
Principle #1Segmentation

3Reliability

If TLB size is increased, then hit rate is improved, but access time increases

Engineering Contradiction:
ImproveTLB hit rateVSAvoidaccess time
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The TLB is segmented into two sub-TLBs with different characteristics: the fixed sub-TLB provides fast, predictable access for common workloads, while the configurable sub-TLB can be optimized for specific page size requirements. This segmentation allows the system to maintain high hit rates without uniformly increasing access time across all operations.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP4020233B1Automated translation lookaside buffer set rebalancing
Publication Date: 2024.04.17 INTEL CORP
  • EP4020233B1 patent drawingFigure 1
  • EP4020233B1 patent drawingFigure 2A~2B
  • EP4020233B1 patent drawingFigure 3A~3B

AI summary

A translation lookaside buffer (TLB) having a fixed sub-TLB and a configurable sub-TLB and methods of using the TLB are provided. The TLB (86) includes a fixed sub-TLB (320, 322) and a configurable sub-TLB (326). The fixed sub-TLB, during runtime, may store a first plurality of TLB entries (340, 342) corresponding to a first page size set (4K, 2M). The configurable sub-TLB, during runtime, is configurable to store a second plurality of TLB entries (346) of a second page size set (4K, 2M, 1G). The second page size set includes at least a first page size of the first page size set (4K, 2M) and includes at least a second page size not of the first page size set (1G).