Configuration Memory Recovery in Semiconductor Integrated Circuits
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Solution Overview
Problem
Conventional semiconductor integrated circuits, such as FPGAs using MRAM for configuration data storage, face increased power consumption during data writing and lack efficient methods to determine data loss after power fluctuations.
Innovation Solution
Implementing a semiconductor integrated circuit with a short-term holding memory for configuration data and a long-term holding memory to indicate power recovery, along with a check circuit to determine data loss and a power supply shutoff recovery control unit to manage data reconfiguration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MRAM is used to store configuration data instead of SRAM, then data retention during power failure is improved, but power consumption during data writing increases
Solution Approach 1:
The patent divides the configuration data storage into two segments: volatile storage (SRAM or buffer memory) for active configuration data and non-volatile storage (MRAM) for backup configuration data. This segmentation allows the system to benefit from the low power consumption of volatile memory during operation while ensuring data retention through non-volatile memory backup, thus resolving the contradiction between reliability and power consumption.
2Reliability
If configuration data is continuously checked after power recovery, then data loss detection is improved, but reactivation time increases
Solution Approach 1:
The patent performs preliminary action by continuously monitoring and comparing configuration data between volatile and non-volatile storage during the standby state before power recovery occurs. This allows the system to detect potential data loss in advance and prepare recovery actions, reducing the reactivation time when actual power failure occurs by avoiding extensive post-recovery checking.
Solution Approach 2:
The patent implements a feedback mechanism where the system continuously compares configuration data between SRAM and MRAM, and based on the comparison result, dynamically adjusts the reconfiguration operation. When data is detected to be consistent, no reconfiguration is performed; when inconsistency is detected, reconfiguration is triggered. This feedback-based approach minimizes unnecessary operations and reduces reactivation time while ensuring reliable data loss detection.
3Reliability
If full configuration data is reconfigured after power recovery, then data integrity is improved, but processing time increases
Solution Approach 1:
The patent applies partial action by performing reconfiguration only for the specific configuration data that was lost or corrupted, rather than reconfiguring the entire configuration set. The system identifies which specific blocks or regions of configuration data are affected and reconfigures only those portions, thereby maintaining data integrity while significantly reducing the processing time compared to full reconfiguration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces power consumption and shortens reactivation time by minimizing unnecessary operations and data access, ensuring efficient data retention during power fluctuations.
Implementation Method 1
an FPGA using a magnetoresistive random access memory (MRAM) as a memory for storing the configuration data
Data Source
AI summary
To reduce power consumption in a semiconductor integrated circuit that holds configuration data. The semiconductor integrated circuit includes a long-term holding memory and a short-term holding memory. Among these memories in the semiconductor integrated circuit, the short-term holding memory has a data holding time shorter than a predetermined time and holds predetermined configuration data. Furthermore, the long-term holding memory in the semiconductor integrated circuit has a data holding time being the predetermined time and holds a specific data indicating whether or not a power supply voltage is recovered after dropping to a value lower than a constant voltage.