Confined Source/Drain Regions with Wrap-Around Contacts

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Solution Overview

Problem

Existing semiconductor device fabrication methods for confined source/drain (S/D) regions with wrap-around contacts face limitations due to impractical confinement structures that remain after S/D region formation, resulting in limited surface area for interfacing with S/D contacts and increased resistance.

Innovation Solution

A method involving a containment structure with a non-sacrificial and sacrificial fin-containment region, where the sacrificial region is selectively removable using etchants non-selective to other spacer materials, exposing sidewalls for wrap-around S/D contacts, and using materials like spin-on carbon or amorphous carbon for high thermal stability and etch selectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a containment structure is used to confine S/D regions during epitaxial growth, then the volume and lateral spread of S/D regions are controlled, but the confinement structure remains after S/D region formation, limiting the surface area available for interfacing with S/D contacts

Engineering Contradiction:
Improvecontrol of volume and lateral spread of S/D regionVSAvoidsurface area for interfacing with S/D contacts
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent applies the extraction principle by selectively removing the sacrificial fin-containment region after the S/D region has been formed within the containment structure. This removal exposes the sidewalls of the contained S/D region, thereby increasing the surface area available for wrap-around S/D contacts while having previously maintained precise control over the S/D region volume and lateral spread during epitaxial growth.

Inventive Principle:
Principle #2Taking out (Extraction)

2Area of stationary object

If the containment structure is removed to increase surface area, then more surface is available for contacts, but it becomes difficult to selectively remove the confinement structure without affecting other spacer materials

Engineering Contradiction:
Improvesurface area for interfacing with S/D contactsVSAvoidselective removal of confinement structure
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The patent applies the local quality principle by designing the containment structure with two distinct regions having different material compositions: a non-sacrificial fin-containment region and a sacrificial fin-containment region. The sacrificial region is specifically engineered to be selective to etchants that are non-selective to other spacer materials, enabling targeted removal of only the desired portion of the containment structure to expose sidewalls for contacts.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If conventional etchants are used to remove confinement structures, then the structure is removed, but other spacer materials are also affected due to lack of selectivity

Engineering Contradiction:
Improveremoval of confinement structureVSAvoidselectivity to etchants
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies the local quality principle by designing the containment structure with two distinct regions having different material compositions: a non-sacrificial fin-containment region and a sacrificial fin-containment region. The sacrificial region is specifically engineered to be selective to etchants that are non-selective to other spacer materials, enabling targeted removal of only the desired portion of the containment structure.

Inventive Principle:
Principle #3Local quality

4Reliability

If wrap-around contacts are formed on exposed sidewalls, then parasitic resistance is reduced, but the process requires selective removal of sacrificial regions which complicates the fabrication process

Engineering Contradiction:
Improveparasitic resistanceVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies the extraction principle by selectively removing the sacrificial fin-containment region after the S/D region has been formed within the containment structure. This removal exposes the sidewalls of the contained S/D region, thereby increasing the surface area available for wrap-around S/D contacts while having previously maintained precise control over the S/D region volume and lateral spread during epitaxial growth.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of semiconductor devices with increased S/D surface area for wrap-around contacts, reducing parasitic resistance and enhancing device performance by allowing selective removal of confinement structures and forming wrap-around contacts on exposed surfaces.

Implementation Method 1

The IC is exposed to an etchant that is selective to the sacrificial fin-containment region, non-selective to the non-sacrificial fin-containment region, and non-selective to a plurality of spacers on the IC. Exposing the IC to the etchant selectively removes the sacrificial fin-containment region and exposes sidewalls of the contained S/D region.

Methodology Applied
Scientific EffectSelective etching:

Implementation Method 2

forming a containment structure having a non-sacrificial fin-containment region and a sacrificial fin-containment region, wherein the containment structure is configured to define a source or drain (S/D) cavity

Methodology Applied
Scientific EffectPhysical containment: Physical Containment

Data Source

PatentUS11362194B2Transistor having confined source/drain regions with wrap-around source/drain contacts
Publication Date: 2022.06.14 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11362194B2 patent drawing
  • US11362194B2 patent drawing
  • US11362194B2 patent drawing

AI summary

Embodiments of the invention are directed to a method of forming a semiconductor device on an integrated circuit (IC). The method includes forming a containment structure having a non-sacrificial fin-containment region and a sacrificial fin-containment region, wherein the containment structure is configured to define a source or drain (S/D) cavity. A S/D region is formed in the S/D cavity. The S/D region includes a contained S/D region defined by the containment structure. The S/D region further includes a non-contained S/D region positioned above the containment structure. The IC is exposed to an etchant that is selective to the sacrificial fin-containment region, non-selective to the non-sacrificial fin-containment region, and non-selective to a plurality of spacers on the IC. Exposing the IC to the etchant selectively removes the sacrificial fin-containment region and exposes sidewalls of the contained S/D region.