Conflict Resolution Logic for Secure Enclave Memory Management
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Solution Overview
Problem
Modern processor systems fail to protect data used by applications running at a lower privilege level from access by compromised applications at higher privilege levels, leading to potential malicious attacks, particularly due to conflicts during the tracking and eviction of Enclave Page Cache (EPC) pages between the Virtual Machine Monitor (VMM) and the guest Operating System (OS).
Innovation Solution
The implementation of conflict resolution logic that provides hardware support for detecting and preventing races on the tracking structure between VMM threads and guest OS threads, and includes a conflict execution control VM exit to resolve conflicts without the guest OS's knowledge, ensuring secure enclave operations and preventing fatal errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the VMM and guest OS both execute tracking instructions to monitor EPC pages independently, then each can manage memory paging autonomously, but conflicts occur during simultaneous tracking operations leading to guest OS crashes
Solution Approach 1:
The patent introduces a hardware-mediated tracking structure with reference counting mechanisms that act as an intermediary between the VMM and guest OS. The tracking instruction increments a reference count when entered, and the hardware monitors when the reference count reaches zero to safely evict EPC pages. This intermediary mechanism allows both VMM and guest OS to execute tracking instructions independently without conflicts, as the hardware coordinate their operations through the shared reference count.
2Quantity of substance
If EPC pages are evicted to free memory space for other enclaves, then memory utilization is improved, but TLB entries may become invalid causing performance degradation
Solution Approach 1:
The patent implements preliminary action by requiring the VMM to execute a tracking instruction before evicting an EPC page. This tracking instruction increments the reference count, ensuring that the page is properly tracked and marked for eviction. The hardware then monitors the reference count and only allows eviction when the count reaches zero, ensuring that all TLB entries have been invalidated or updated. This preliminary tracking action prevents performance degradation by ensuring proper synchronization before memory eviction occurs.
3Reliability
If the VMM suspends all enclave activities when issuing tracking instructions to avoid conflicts, then tracking conflicts are prevented, but system productivity decreases due to unnecessary suspensions
Solution Approach 1:
The patent enables self-service by allowing the guest OS to independently execute tracking instructions on EPC pages without VMM suspension. The hardware tracking structure automatically manages reference counts and coordinates between multiple tracking instructions from different sources (VMM and guest OS). This eliminates the need for the VMM to suspend enclave activities, as the hardware automatically prevents conflicts through its reference counting mechanism, thereby maintaining high productivity while ensuring reliability.
Data Source
AI summary
A processing device includes a conflict resolution logic circuit to initiate a tracking phase to track translation look aside buffer (TLB) mappings to an enclave memory cache (EPC) page of a secure enclave. The conflict resolution logic circuit is further to execute a tracking instruction as part of the tracking phase, wherein the tracking instruction takes any page in the secure enclave as an argument parameter to the tracking instruction.