Conformal GAA Transistor Fabrication for 2D Channel Preservation
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Solution Overview
Problem
Existing manufacturing processes for gate-all-around (GAA) transistors using 2D materials face challenges such as thermal and mechanical degradation of 2D material monolayers due to high thermal budgets, leading to structural and performance issues, and increased manufacturing costs.
Innovation Solution
A manufacturing process for GAA transistors that introduces 2D material layers after the stack has been structured, using selective etching and deposition methods to form channels and gates, ensuring the 2D material is encapsulated and protected, thereby reducing degradation risks and maintaining structural integrity while utilizing standard microelectronic technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If 2D material monolayers are used in conventional GAA transistor manufacturing processes with high thermal budgets, then the transistor architecture can be formed, but the 2D materials undergo thermal and mechanical degradation leading to structural issues and performance problems
Solution Approach 1:
The patent applies preliminary action by forming the complete transistor structure including source, drain, and gate regions before introducing the 2D material channel. The sacrificial gate structure is formed first, followed by spacer formation and material deposition, with the 2D material being introduced as a final step. This reverses the conventional sequence where 2D materials are placed early and subjected to subsequent high-temperature processing, thereby preventing thermal degradation while maintaining structural integrity.
2Ease of manufacture
If 2D material monolayers are freely suspended during manufacturing steps, then the transistor structure can be assembled, but mechanical stresses degrade the final structure and performance
Solution Approach 1:
The patent employs the flexible shells and thin films principle by using the sacrificial gate structure as a mechanical support framework. The 2D material channel is deposited conformally over this sacrificial structure, which provides underlying mechanical support and prevents the thin 2D material from being freely suspended. This approach maintains ease of manufacture through standard conformal deposition techniques while significantly improving mechanical strength and preventing stress-induced degradation.
3Adaptability or versatility
If modifications and adaptations are made to existing manufacturing technologies to accommodate 2D materials, then 2D material GAA transistors can be manufactured, but additional costs and limitations are imposed on industrial manufacturing
Solution Approach 1:
The patent applies universality by designing a manufacturing process that uses the same sacrificial gate and spacer formation techniques for both conventional and 2D material-based transistors. The process leverages existing semiconductor fabrication capabilities including standard CVD, ALD, and etching tools. By maintaining process universality and avoiding specialized equipment or radical process changes, the patent enables 2D material transistor manufacturing without imposing additional costs or industrial limitations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process enhances the reproducibility and reduces manufacturing costs by preserving 2D materials, improving mechanical strength and structural integrity, and allowing integration into existing production lines without modifying standard structuring steps.
Implementation Method 1
Fill the first spaces with a dielectric material to form internal spacers
Implementation Method 2
Deposit a layer based on a semiconductor material in the second spaces, on the grid dielectric layer
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 3A~3B
AI summary
The invention relates to a method for manufacturing a device comprising GAA transistors (T1, T2). Advantageously, the channels (41) of the transistors (T1, T2) are formed by depositing a semiconductor material, preferably a 2D material, after selective removal of certain layers from the initial stack. The surrounding gates (50) are formed after selective removal of the remaining layers from the initial stack. The initial stack does not include the semiconductor material or the gate material (50). The subsequent deposition of the semiconductor material aims to better preserve the semiconductor material.