Conformal Metal Gate Height Control for High Aspect Ratio FETs

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Solution Overview

Problem

The challenge in forming high-quality replacement metal gates (RMGs) for field effect transistors (FETs) lies in depositing and removing materials from gate openings with small critical dimensions and high aspect ratios, which complicates the adjustment of metal layer thicknesses for fine-tuning performance parameters, especially in non-planar devices like FINFETs and GAAFETs.

Innovation Solution

A method involving the deposition of conformal dielectric and metal layers within the gate opening, followed by controlled chamfer processes to selectively adjust the heights of these layers, ensuring improved gate quality and height control, particularly for RMGs with small critical dimensions and high aspect ratios, using different etch techniques to maintain a uniform etch rate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional replacement metal gate processing is used with small gate critical dimensions and high aspect ratios, then gate leakage is reduced and drive current is increased, but material deposition and removal becomes difficult and metal layer thickness adjustment becomes complex

Engineering Contradiction:
Improvegate leakage reductionVSAvoidmaterial deposition and removal difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The gate structure is segmented into multiple conformal metal layers (first conformal metal layer, second conformal metal layer, third conformal metal layer) deposited at different stages. Each layer can be independently controlled and adjusted, allowing precise thickness control without requiring complete removal and redeposition of the entire metal gate structure. This segmentation enables fine-tuning of gate properties while maintaining the benefits of small gate CD and high aspect ratio.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces a vertical dimension to metal layer deposition by forming conformal layers that wrap around the channel region at different heights. The first conformal metal layer is deposited at a lower height, the second at an intermediate height, and the third at a higher height, creating a multi-level conformal structure. This dimensional approach allows independent control of metal thickness at different gate regions, solving the difficulty of uniform thickness adjustment in high aspect ratio gates.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If multiple conformal metal layers are deposited to fine-tune performance parameters, then gate performance is optimized, but process complexity increases

Engineering Contradiction:
Improvemetal layer thickness controlVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

A conformal dielectric layer is deposited beforehand to line the gate opening and provide a foundation for subsequent metal layer deposition. This preliminary dielectric layer acts as a template and protection layer, enabling precise formation of multiple conformal metal layers without requiring complex process adjustments. The preliminary action simplifies the overall process by establishing a controlled environment for subsequent deposition steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the deposition parameters and conditions for each conformal metal layer, allowing independent optimization of thickness and composition. By controlling deposition parameters such as temperature, pressure, and material flux for each layer separately, precise thickness control is achieved while managing process complexity through systematic parameter variation rather than structural complexity.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If gate height is increased for non-planar devices, then device performance is improved, but aspect ratio increases making material processing more difficult

Engineering Contradiction:
Improvedevice performanceVSAvoidmaterial processing difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The conformal metal layers are nested within the gate opening structure, with each layer conformally wrapping around the channel region. The first conformal metal layer is nested at a lower level, the second layer is nested above it, and the third layer is nested at the highest level. This nesting approach allows material to be deposited and processed in a controlled manner within the high aspect ratio gate opening, making material processing feasible despite the increased gate height and aspect ratio.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively increases the available space within the gate opening for deposition and chamfering of additional metal layers, allowing for uniform gate heights across the wafer and preventing oxidation of n-type work function metals, thereby enhancing the quality and uniformity of RMGs.

Implementation Method 1

depositing a conformal dielectric layer to line a gate opening

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Implementation Method 2

depositing a first conformal metal layer over the conformal dielectric layer

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Implementation Method 3

a first chamfer process can be performed in order to etch back the first conformal metal layer within the gate opening

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS10833169B1Metal gate for a field effect transistor and method
Publication Date: 2020.11.10 GLOBALFOUNDRIES US INC
  • US10833169B1 patent drawing
  • US10833169B1 patent drawing
  • US10833169B1 patent drawing

AI summary

Disclosed is a metal gate (e.g., a replacement metal gate (RMG) for a field effect transistor (FET) and a method of forming the metal gate. The method includes depositing a conformal dielectric layer to line a gate opening and performing a series of unclustered and clustered conformal metal deposition and chamfer processes to selectively adjust the heights of conformal metal layers within the gate opening. By selectively controlling the heights of the conformal metal layers, the method provides improved overall gate height control and gate quality particularly when the metal gate has a small critical dimension (CD) and/or a high aspect ratio (AR). The method can also include using different etch techniques during the different chamfer processes and, particularly, when different materials and/or different material interfaces are exposed to an etchant in order to ensure an essentially uniform etch rate of the conformal metal layer(s) at issue in a direction that is essentially vertical.