Conformal Source/Drain Contacts for Low-Resistance Fin Transistors
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Solution Overview
Problem
Conventional contact formation schemes in highly scaled multi-gate transistors result in elevated transistor contact resistance, limiting device performance beyond 50%, due to reduced contact areas and increased complexity in manufacturing.
Innovation Solution
A novel method for forming source/drain contacts in multi-gate transistors involves etching deeper contact holes to increase contact areas, using a conformal first contact layer with a semiconductor-metal alloy and a second metallic layer, which reduces contact resistance by providing larger contact areas and low energy barriers for charge carriers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional contact formation scheme is used, then manufacturing process is simpler, but contact resistance increases significantly
Solution Approach 1:
The contact structure is divided into multiple segments: a first contact layer conformally covering sidewalls and top surface, and a second contact layer filling the contact hole. This segmentation allows each layer to perform its function optimally - the first layer provides low resistance contact paths along sidewalls, while the second layer provides mechanical support and electrical connection, achieving ultra-low contact resistance without excessive manufacturing complexity
Solution Approach 2:
The contact formation transitions from conventional planar contact to three-dimensional contact by extending the contact area along the sidewalls of the Fin structure. The first contact layer wraps around the sidewalls, creating contact paths in the vertical dimension, which significantly increases the effective contact area and reduces contact resistance beyond what conventional top-surface contacts can achieve
2Reliability
If contact area is increased to reduce contact resistance, then contact resistance decreases, but device footprint increases
Solution Approach 1:
Instead of increasing contact area in the planar direction (which would increase footprint), the invention extends the contact area vertically along the sidewalls of the Fin structure. The first contact layer conformally covers the sidewalls from the bottom to the top of the Fin, utilizing the vertical dimension to achieve large contact area within a small footprint, thus reducing contact resistance without increasing device area
Solution Approach 2:
The contact structure applies different material properties and geometries to different locations: the first contact layer is conformally deposited on sidewalls with specific material composition for low resistance, while the second contact layer fills the contact hole with different material properties for mechanical support. This local optimization achieves ultra-low contact resistance concentrated at the contact region without increasing overall device footprint
3Reliability
If deeper contact holes are etched to increase contact areas, then contact resistance reduces, but manufacturing complexity increases
Solution Approach 1:
The contact structure is divided into two functional segments: a first contact layer conformally deposited on sidewalls and top surface, and a second contact layer filling the remaining contact hole space. This segmentation simplifies the manufacturing process by using standard conformal deposition and fill techniques, avoiding the need for complex deep etching processes while still achieving increased contact area through the conformal sidewall coverage
Solution Approach 2:
The first contact layer is deposited conformally on the sidewalls before filling the contact hole with the second contact layer. This preliminary action of conformal deposition creates the low-resistance contact paths along sidewalls in advance, and the subsequent fill operation simply completes the contact structure, simplifying the overall manufacturing process compared to attempting to create complex three-dimensional contact structures in a single step
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach significantly reduces contact resistance, enhancing transistor performance by achieving ultra-low contact resistivity in the range of 1×e−10 to 1×e−8 ohm·cm2, while simplifying the manufacturing process through increased contact areas and conformal contact layer profiles.
Implementation Method 1
using a conformal first contact layer with a semiconductor-metal alloy and a second metallic layer, which reduces contact resistance by providing larger contact areas and low energy barriers for charge carriers
Data Source
AI summary
A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.