Through-Substrate Connection Pillars With Insulating Support
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Solution Overview
Problem
Existing connection pillars in electronic chips are fragile due to high aspect ratios, costly to manufacture, and prone to detachment, especially when small in size.
Innovation Solution
The electronic circuit design includes conductive pillars extending through the semiconductor substrate with insulating layers surrounding them and anchored over the entire substrate thickness, supported by insulating walls, enhancing mechanical strength and reducing detachment risk.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If connection pillars have high aspect ratio to reduce chip area, then area is reduced, but mechanical strength and reliability deteriorate
Solution Approach 1:
The connection pillar is constructed as a composite structure with a conductive core (copper or aluminum) surrounded by an insulating material layer (silicon oxide or silicon nitride). This composite design allows the pillar to maintain high aspect ratio for area reduction while the insulating material provides mechanical support and prevents detachment, resolving the contradiction between compact area and structural strength.
2Area of moving object
If connection pillars are made smaller to increase density, then area is reduced, but fragility and detachment risk increase
Solution Approach 1:
By embedding the small-diameter conductive core within a surrounding insulating material layer that extends to the chip surface, the structure gains mechanical reinforcement without increasing area. The insulating material acts as a protective shell that prevents the thin conductive pillar from detaching, enabling high-density interconnection while maintaining reliability.
Solution Approach 2:
The connection pillar structure is segmented into functional zones: the conductive core for electrical connection and the insulating material layer for mechanical support and protection. This segmentation allows each component to be optimized independently - the core for minimal area and the insulating layer for maximal mechanical strength and detachment resistance.
3Area of moving object
If aspect ratio is increased to reduce area, then area is reduced, but manufacturing complexity and cost increase
Solution Approach 1:
The manufacturing process merges the formation of the insulating material layer with the existing chip fabrication steps. The insulating material is deposited using standard semiconductor techniques (CVD or PVD) that are already part of the manufacturing flow, and the encapsulation structure is integrated with the chip surface preparation. This combining approach avoids adding significant complexity while achieving the high aspect ratio structure.
Data Source
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AI summary
The present description relates to an electronic circuit (50) comprising a semiconductor substrate (12) having first and second faces (14, 16) opposite each other and electrically conductive pillars (60), intended to be connected to an element external to the electronic circuit, extending through the semiconductor substrate (12) from the second face (16) to the first face (14) and projecting outwards from the first face (14).